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Transistor and Circuit Design for 100-200 GHz ICs

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http://ieeexplore.ieee.org/iel5/4/32287/01506895.pdf?isnumber=32287∏=JNL&arnumber=1506895&arSt=+2061&ared=+2069&arAuthor=+Griffith%2C+Z.%3B++Dong%2C+Y.%3B++Scott%2C+D.%3B++Wei%2C+Y.%3B++Parthasarathy%2C+N.%3B++Dahlstrom%2C+M.%3B++Kadow%2C+C.%3B++Paidi%2C+V.%3B++Rodwell%2C+M.J.W.%3B++Urteaga%2C+M.%3B++Pierson%2C+R.%3B++Rowell%2C+P.%3B++Brar%2C+B.%3B++Lee%2C+S.%3B++Nguyen%2C+N.X.%3B++Nguyen%2C+C.
Abstract

Compared to SiGe, InP HBTs offer superior electron transport properties but inferior scaling and parasitic reduction. Figures of merit for mixed-signal ICs are developed and HBT scaling laws introduced. Device and circuit results are summarized, including a simultaneous 450 GHz f,tau and 490 GHz f,max DHBT, 172 GHz amplifiers with 8.3-dBm output power and 4.5-dB associated power gain, and 150 GHz static frequency dividers (a digital circuit figure-of-merit for a device technology). To compete with advanced 100 nm SiGe processes, InP HBTs must be similarly scaled and high process yields are imperative. Described are several process modules in development -- these include an emitter-base dielectric sidewall spacer for increase yield, a collector pedestal implant for reduced extrinsic C,cb, and emitter regrowth for reduced base and emitter resistances.

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