UC Berkeley

As scaling continues, the number of transistors per unit area and power density are both on the rise. A reduction in V_dd is highly desirable to reduce power consumption. For MOSFETs however, this would mean scaling the threshold voltage to maintain performance and thereby enhancing the off current and static power consumption since MOSFETs are limited to a swing of 60mV/decade at best. A low voltage transistor that allows V_dd scaling to 0.5V and below is highly desirable.

In this thesis, gate induced band-to-band tunneling transistors are explored as a low voltage alternative because of their potential to achieve lower than 60mV/decade turn-off. Since BTBT is strongly dependant on the band gap of the semiconductor, moving from Silicon to Germanium to lower band gap materials can help scale ,V_dd. Biaxially strained Si_1-xGe_x based heterostructures can provide ultra low effective band gaps. Strain is used to engineer complimentary Si_1-xGe_x heterostructures with low effective band gap for both N and P type transistors. The design and fabrication of heterostructure based tunnel transistors is explored to help scale V_dd to 0.5V and below. Dopant engineering techniques to enhance the electric field are also explored both with simulations and experiments.