A High-Efficiency Charge-Pump Gate Drive Power Delivery Technique for Flying Capacitor Multi-Level Converters with Wide Operating Range

—In this work, we present a robust gate drive power delivery approach well-suited for converter topologies, such as the ﬂying-capacitor multi-level (FCML) converter, that contain several series-connected switching elements. The proposed power delivery network leverages internal voltages inherent to the FCML topology in combination with a charge-pump mechanism to provide gate drive power with high efﬁciency. The charge-pump design operates independently of the primary switching devices, allowing the converter to operate at very low duty ratios without suffering from signiﬁcant degradation of the ﬂoating supplies. The concept is validated in a hardware prototype, demonstrating an estimated 38% reduction in gate drive power delivery losses compared to competing techniques. Moreover, the robustness of the technique is validated through incorporation into a 400V, 2kW 6-level FCML DC-DC converter, achieving a 99.07% peak conversion efﬁciency and 2.05kW/in 3 power density.


I. INTRODUCTION
In recent work, flying-capacitor multi-level (FCML) converter implementations have demonstrated greatly increased power densities and efficiencies compared to more conventional 2-level topologies [1], [2].This improved performance is enabled by both a multiplication of the effective switching frequency observed by the inductor, and by reduced voltseconds applied to it -effects described in detail in [1], [3], and [4].
FCML converters with high level-count contain many power switches connected in series.The large number of power switches referenced to different voltage potentials presents a challenge for providing power to the associated floating gate drivers.An example of a 6-level buck-type FCML converter containing 10 power switches is shown in Fig. 1.Physical implementations of such a converter would require 10 gate drive supplies capable of enhancing their respective power devices with a sufficiently large gate-tosource voltage.In Fig. 1, these 10 supplies are shown as independent voltage sources, each referenced to the source terminal of the power device it drives.One verified method for generating these floating supplies utilizes isolated DC-DC converters [1], [5], [6].Converters incorporating such supplies are not only expensive, but also typically report volumes greatly exceeding that of their powertrain.For an N-level flying-capacitor converter, where N refers to the number of discrete voltage levels the converter is capable of generating at its switched node (denoted V SW in Fig. 1), the number of floating power supplies scales as (1) Fig. 1.A 6-level buck-type FCML converter with gate drive supplies generated from floating isolated voltage sources.In practice, this approach consumes significant volume, often greater than the power stage itself in modern designs [1], [6].

II. BACKGROUND
To generate the required floating supply voltages without sacrificing significant converter volume, recent works on gate drive power delivery techniques for FCML converters have proposed the "cascaded bootstrap" approach for generating the required floating gate driver supplies [7].Low-dropout linear regulators (LDOs) are included in this approach to regulate the bootstrap capacitor voltage to a fixed and reliable value that can be used to drive the FETs.An example 6-level FCML with a cascaded bootstrap gate drive supply is shown in Fig. 2.
Each bootstrap capacitor only charges when the power switch whose drain is connected to its negative plate conducts.If this charging interval is very short, the bootstrapping network operates in the fast switching limit (FSL) [8] and complete charge transfer does not occur between the bootstrap capacitors.As a practical example, the converter of [7] reports that for switching frequencies above 100 kHz, the charging current into the bootstrapped supply is roughly constant.Given that there is an incentive to switch at higher frequencies for reduced converter passive component volume Fig. 2. A practical 6-level FCML with the cascaded bootstrap technique of [7] providing gate drive power.[9], operation in the FSL region is often encountered in practical implementations of FCML converters.
As the number of switches in the FCML increases, the gate drive supply voltage feeding the bootstrap chain must also increase, which corresponds to additional power loss across the LDO circuitry.Starting from the ground-referenced LDO connected to V DD in Fig. 2, the loss in the k th LDO cascaded from it scales approximately as where V f,n represents the voltage drop across the n th bootstrap diode during conduction.Assuming that each gate drive supply consumes an average gating current I g , we can use a piecewise-linear conduction model for the bootstrap diodes to estimate the minimum voltage V DD required to generate at least 5.5V on V DD,H5 .This a typical lower limit suitable for driving gallium nitride (GaN) power semiconductor switches with a well-regulated 5 V gate-to-source voltage.With a target value for the topmost gate drive supply in the converter (V DD,H5 ), and assuming a piecewise-linear diode conduction model, the required average high-side supply voltages V DD,Hk for this 6-level FCML can be expressed as where D represents the converter duty ratio and R D,on is the conduction resistance of the bootstrap diode.Similarly, the required low-side supplies can be expressed as To achieve 5 V gate drive on all power switches, we estimate the ground-referenced supply voltage V DD,L5 must be significantly oversized above 16 V, which matches the findings in [7].where we assume the high-side switches M H,x of the FCML are driven with on-time equal to DT s where T s is the switching period, and the low-side switches M L,x are driven with the complementary switching signals.The switching signals Φ L5 , Φ L4 , ..., Φ H5 are commonly generated via Phase-Shifted Pulse-Width Modulation (PSPWM) [1], [4], [7], [10].With cascaded bootstrapping, we can expect charge to be less effectively distributed through the high-side supplies at low duty ratios [7].Our averaged model in ( 3) and (4) shows that to accommodate converter operation at very low duty ratios, the ground-referenced supply voltage V DD must become very large.
An estimation of the gate drive supply voltage needed for operation at D = 5 % is shown in Fig. 3, using (3) and (4).Diode parameters V D,on = 0.6 V and R D,on = 5 Ω are used to match the simulation parameters reported in [7].The gate drive power supply has to be sized at nearly 16 V to ensure the LDO at the end of the bootstrap chain receives adequate input voltage to turn on M H5 , which matches the simulation results in [7].We verify the FSL operation of the bootstrapping network at D = 5 % and f sw = 100 kHz through a SPICE simulation, with results plotted in Fig. 4.

III. OSCILLATOR-DRIVEN CHARGE-PUMP
In this work, we propose generating the floating gate drive supplies for the high-side switches via oscillatordriven charge-pumps that are connected as shown in Fig. 5.This approach is derived from the gate driven chargepump proposed in [7], with the low-side pumping source replaced by an independent gate driver oscillating with a 50 % duty irrespective of the FCML converter duty.The oscillator derives its power from its associated unregulated low-side supply.Here we will demonstrate that in high levelcount FCMLs, despite the two diode forward-voltage drops introduced in the charge-pump, this approach greatly reduces the number of diodes through which charge must conduct to reach the large majority of high-side supplies.A detailed schematic diagram of the charge-pump structure within an N-level FCML is shown in Fig. 6.
The oscillator connected to the low-side floating supply charges C pump using its corresponding C f ly and delivers charge onto the LDO input capacitor of the high-side driver.This operation is performed at an optimal 50% duty cycle, irrespective of the duty cycle of the converter itself, allowing maximum charge to propagate through C pump .Note that as charge flows through two diodes, the high-side supply voltage lies below the low-side supply voltage that feeds it by two diode voltage drops.We assume that C pump , C f ly , C L,N −1 , and C H,N are large enough such that they do not experience significant voltage ripple as they transfer charge.This allows us to assume that the charge-pump also operates in the FSL region.
When the oscillator output is driven low, the pump capacitor voltage can be solved from the following voltage loop equation and when oscillator output is driven high, the pump capacitor voltage can be found from We assume that the charge-pump duty cycle is 50 %, and that each diode conducts an average current I g .We can combine ( 5) and ( 6) to obtain V H,N as a function of V L,N −1 .
Similar to (4), we can form the following expressions for the low-side supplies in the 6-level converter employing our proposed gate drive power delivery technique: As the diodes in the charge-pump are rated for significantly lower voltages than the bootstrap diodes, we can expect that the charge-pump diodes are higher conductivity devices, especially if the devices have similar die areas.Thus, we assume that in the proposed approach, the minimum value for V DD is set by the floating supply referenced to the switched node (M H1 in our 6-level example).This is especially true at low duty ratios where large pulsed currents flow through the bootstrap diodes.We thereby simplify (8) into The required low-side supply voltages can therefore be expressed as (10) To compare the gate drive power consumption of our proposed approach to that of the prior best approach, the cascaded bootstrap (Section II), we can analyze the minimum gate drive supply voltage required to feed the chain of floating-switch drivers and the power consumption of the two competing networks.The gate drive supply V DD must be chosen such that the unregulated voltage at the LDO inputs for all floating supplies meets the LDO dropout voltage specification, V DO .For a general N-level FCML, the minimum V DD with cascaded bootstrapping is given by (11) whereas, with the proposed oscillator-driven charge-pump approach, the minimum V DD expression is given by where f 1 and f 2 capture the dependence of the diodes' voltage drops on the current flowing through them.The following expressions for f 1 and f 2 can be derived from ( 3), ( 4), (9), and (10).
Fig. 9. Plot of minimum V DD as a function of converter duty ratio D under the two competing gate drive power delivery techniques.We illustrate the minimum V DD required for different level-counts N , with Ig = 5 mA and R D,on = 5 Ω. f 1 is significantly greater than f 2 at low duty ratios and contributes to a majority of the increase in required V DD .This verifies the need to increase V DD in cascaded bootstrap at low duty ratios.
Figure 9 illustrates the expressions in ( 11) -( 14) for several different level-counts N with I g = 5 mA and R D,on = 5 Ω.From (11) and ( 13) it is clear that with cascaded bootstrapping, as the duty ratio D approaches 0 %, the supply voltage V DD must be increased without bound.By contrast, with the proposed technique, ( 12) and ( 14) show that the supply voltage required converges to a finite value as D approaches 0 %.Given that the average current provided by V DD at the input to the gate drive network is N • I g for both approaches, in considering (11) and ( 12) it becomes apparent that the oscillator-driven charge-pump technique demonstrates lower average gate drive power consumption by enabling use of a lower voltage V DD .The ability of the proposed method to operate near 0 % duty while maintaining efficient power delivery to all gate drivers is a highly desirable trait FCML-unfolder inverter (e.g.[1]) in which the FCML is instructed to drive to zero-voltage output at twice the line frequency inverter output voltage changes polarity.

IV. HARDWARE PROTOTYPE AND EXPERIMENTAL RESULTS
hardware prototype of a bi-directional FCML converter incorporating the oscillator-driven charge-pump scheme has constructed, with annotated photographs shown in Fig. 10.A breakdown of the converter's specifications is provided in Table I.The converter is designed for high power density and was tested up to 2.03 kW at 400 V DC input, 200 V DC output, and at a device switching frequency of 120 kHz (corresponding to 600 kHz effective frequency seen by the inductor).The converter achieves a peak efficiency of 99.10 % (99.07 % when including a measured 380 mW of gate drive power) at 1.52 kW output power.Figure 11     was employed to take high-precision measurements of input and output power.
With our proposed power delivery technique, the high-side supply voltages are maintained well above the LDO dropout levels, as they are fed directly from low-side counterparts independent of the converter's duty ratio.Conversely, the floating supplies for the low-side devices in our hardware prototype (M L1 -M L5 ) exhibit higher values at lower duty ratios, as they are powered through a cascaded bootstrap arrangement in which charge delivery is a strong function of converter duty ratio [7]. Figure 12 illustrates measured steady-state converter waveforms at a very low duty cycle of D = 2.5 %, verifying correct operation with PSPWM under extreme step-down conditions.Figures 13-15 illustrate measured floating supply voltages at duty ratios of 2.5 %, 50 %, and 70 % respectively and demonstrate effective gate drive power delivery over a wide range of duty ratios.
The overall efficiency of the proposed power delivery   technique is equal to the voltage conversion ratio V GS,on V DD , similar to that of a single linear regulator.As power delivery to the high-side supplies is independent of converter duty ratio, we are able to achieve FCML conversion ratios as low as 2.5 % with a reduced supply voltage V DD of 10.01 V and a measured gate drive efficiency of 49.95 %.In contrast, the cascaded bootstrap approach requires a supply voltage of 16 V or greater to maintain sufficient high-side gate drive voltage at a relaxed duty of 5 %.As such, the proposed technique achieves at least a 38 % improvement in gate drive power consumption at 5 % duty, with larger gains observed as duty decreases further.

V. CONCLUSION
In this work, we have demonstrated a gate drive power delivery scheme with reduced gate drive power consumption that enables FCML converter operation at extremely low duty ratios.The proposed oscillator-driven charge-pump power delivery technique was implemented in a 6-level FCML converter prototype that achieved 2.05 kW/in 3 power density and 99.07 % peak conversion efficiency.

Fig. 3 .
Fig.3.Estimated minimum LDO voltages for converter operation at D = 5 % for a 6-level converter utilizing the cascaded bootstrap power delivery technique.A piecewise-linear diode model is used with V D,on = 0.6 V and R D,on = 5 Ω.To achieve 5 V gate drive on all power switches, we estimate the ground-referenced supply voltage V DD,L5 must be significantly oversized above 16 V, which matches the findings in[7].

Fig. 4 .
Fig.4.SPICE simulation of bootstrap diode current at D = 5 % with a piecewise-linear diode model for D H5 and a 5 mA current source load modeling average gating current of M H5 .fsw = 100 kHz, V D,on = 0.6 V, R D,on = 5 Ω.The bootstrap network operates in the fast-switching limit when the power switches conduct for short durations.

Fig. 5 .Fig. 6 .
Fig.5.Proposed gate drive power delivery network.Oscillator-driven charge-pumps (red) supply the high-side devices and operate at 50% duty independent of converter switching activity, allowing effective high side power delivery independent of converter duty cycle.

Fig. 7 .Fig. 8 .
Fig. 7. Oscillator-driven charge-pump conduction path in State A. Cpump is charged up to the same voltage as flying capacitor C f ly minus one diode forward-voltage drop.

Fig. 10 .
Fig. 10.Photograph of the constructed 6-level FCML prototype with key components annotated.The converter volume is approximately 0.987 in 3 .