Sensors link the physical and electronic worlds, making them useful in environmental, automotive, industrial, communication, and medical applications, among many more. In the first chapter of this dissertation, current sensors and current-sensing front-ends are reviewed, aiming to provide readers with all-around design guidance from both sensor and circuit perspectives. Starting from the transduction method, capacitive, resistive, diode/FET-based, and MEMS sensors are individually reviewed with a focus on applications, circuit models, and nonidealities that must be considered for front-end design. This is followed by a discussion of current-sensing front-ends, specifically transimpedance amplifiers (TIAs), current conveyors (CC), and current-mode delta-sigma (I-ΔΣ) modulators. Each front-end is analyzed in terms of gain, bandwidth, stability, noise, and general design considerations are presented. In this chapter, state-of-the-art works for each front-end are also summarized, and tradeoffs between different architectures are discussed. The following chapters describe two application-specific current front-ends.In Chapter 2, a novel label- and immobilization-free biosensing technique, transient induced molecular electronic spectroscopy (TIMES), was introduced. An 8-channel array of low-noise (30.3 fA/√Hz) current sensing front-ends with on-chip microelectrode electrochemical sensors was proposed to observe real-time protein-ligand interactions. The analog front-end (AFE) consists of a 1st-order continuous-time delta-sigma (CT-ΔΣ) modulator that achieves 123 fA sensitivity over a 10 Hz bandwidth and 139 dB cross-scale dynamic range with a 2-bit programmable current reference. A digital predictor and tri-level pulse width modulated (PWM) current-steering DAC realize the equivalent performance of a multi-bit ΔΣ in an area- and power-efficient manner. The AFE consumes 50.3 µW and 0.11 mm2 per readout channel. In Chapter 3, an AFE for fast-scan cyclic voltammetry (FSCV) with analog background subtraction using a pseudo-differential sensing scheme to cancel the large non-faradaic current before seeing the front-end. As a result, the AFE can be compact and low-power compared to conventional FSCV AFEs with dedicated digital back-ends to digitize and subtract the background from subsequent recordings. The proposed AFE, fabricated in a 0.18-µm CMOS process, consists of a class-AB common-mode rejection circuit, a low-input-impedance current conveyor, and a 1st-order I-∆Σ modulator with an infinite impulse response quantizer. This AFE achieves an effective dynamic range of 83 dB with a state-of-the-art 39.2 pArms input-referred noise loaded with a 1 nF input capacitance (26.5 pArms open-circuit) across a 5 kHz bandwidth while consuming only 3.7 μW. This design was tested with carbon-fiber microelectrodes scanned at 300 V/s using flow-injection of dopamine, a key neurotransmitter.

The combination of ultra-low power analog front-ends and CMOS-compatible transducers enable new applications, such as environmental monitors, household appliances, health trackers, etc. that are seamlessly integrated into our daily lives. Furthermore, wireless connectivity allows many of these sensors to operate both independently and collectively. These techniques collectively fulfil the recent surge of internet-of-things (IoT) applications that have the potential to fundamentally change daily life for millions of people.

In this dissertation, the circuit and system design of wireless receivers and sensors is presented that explores the challenges of implementing long lifespan, high accuracy, and large coverage range IoT sensor networks. The first is a wake-up receiver (WuRX), which continuously monitors the RF environment to wake up a higher-power radio upon detection of a predetermined RF signature. This work both improves sensitivity and reduces power over prior art through a multi-faceted design featuring an impedance transformation network with large passive voltage gain, an active envelope detector with high input impedance to facilitate large passive voltage gain, a low-power precision comparator, and a low-leakage digital baseband correlator.

Although pushing the prior WuRX performance boundary by orders of magnitude, the first work shows moderate sensitivity, inferior temperature robustness, and large area with external lumped components. Thus, the second work shows a miniaturized WuRX that is temperature-compensated, yet still consumes only nano-watt power and millimeter area while operating at 9 GHz. To further reduce the area, a global common-mode feedback is utilized across the envelope detector and baseband amplifier that eliminates the need for off-chip ac-coupling components. Multiple temperature-compensation techniques are proposed to maintain constant bandwidth of the signal path and constant clock frequency. Both WuRXs operate at 0.4 V supply, consume near-zero power and achieve ~-70 dBm sensitivity.

Lastly, the first reported CMOS 2-in-1 relative humidity and temperature sensor is presented. A unified analog front-end interfaces on-chip transducers and converts the inputs into a frequency vis a high-linearity frequency-locked loop. An incomplete-settling switched-capacitor-based Wheatstone bridge is proposed to sense the inputs in a power-efficient fashion.

The rapid proliferation of Internet of Things (IoT) devices has revolutionized the technological landscape, permeating various domains and significantly impacting how we interact with the digital and physical realms. As everyday objects become imbued with the capability to collect, manipulate, and acquire data autonomously. Smart distributed sensor networks are formed and are expected to allow transformative changes in sectors such as healthcare, industrial production, and agriculture by allowing continuous monitoring and data-supported decision-making, improving outcomes and efficiency.The design of these highly advanced sensor nodes presents challenges as they must be extremely power efficient to allow for continuous long-term monitoring with a small battery or energy harvester to ensure unobtrusive form factors. A key component to reducing the power consumption and allowing large-scale deployment of IoT sensors is the use of on-device data processing, which reduces the data-transmission bandwidth, latency, and power consumption. This digital heavy preprocessing drives the system design towards selecting highly integrated system-on-chip (SoC) solutions that rely on the advanced process nodes for highly efficient operation of the digital core in charge of data processing at the sensor nodes. However, these advanced technologies do not scale as well for analog front-ends in charge of acquiring the sensor data as they do for digital signal processing with second-order effects significantly degrading key analog transistor parameters (gain, gate leakage, mismatches, etc.), making the design of high-performance analog circuits increasingly difficult. A lot of research has been dedicated to developing alternative architectures that are more resilient or even benefit from technology scaling. Among these architectures, voltage-controlled oscillator (VCO) based analog-to-digital converters (ADC) leverage digital-friendly ring oscillators to perform signal processing and quantization, providing highly scalable analog-to-digital interfaces. These VCO-based ADCs have been mostly designed for high-speed applications with MHz of bandwidth but have started showing their potential for lower bandwidth sensor nodes thanks to their supply insensitivity, infinite DC gain, and compact area. However, many challenges are associated with designing high dynamic range (DR) ADCs using VCO-based integrators as they have limited intrinsic linearity and require a large oversampling ratio due to being limited to 1st-order noise shaping. This dissertation presents several innovations at the circuit and architecture level that can increase the noise-shaping order of VCO-based ADCs and achieve outstanding linearity. These techniques were integrated into two prototype chips: 1) an ADC for the direct-digitization of biopotential signals and 2) a purpose sensor front-end ADC for ultra-low-power IoT nodes. The first prototype is intended to be used for wearable continuous health monitoring. It was designed to interface directly with high-impedance recording electrodes and provide a wide dynamic range and linearity to absorb motion artifacts and correct them in the digital domain. The prototype ADC achieves 2nd-order noise-shaping with high linearity and power efficiency using a novel Gated-inverted-ring-oscillator(GIIRO)-based time-to-digital converter and a multi-quantizer scheme. The ADC achieves a dynamic range greater than 90 dB and above 110 dB of linearity while consuming only 5.4 µW of power. This corresponds to a Schreier Figure of Merit (FoM) of 174.7 dB, which was state-of-the-art for VCO-based ADCs at the time of publication. The second prototype was developed by building upon the feedforwarding techniques commonly used in the standard voltage domain ADC architectures and applying them to capacitively coupled VCO-based ADCs. Using the pseudo-virtual ground (PVG) at the input of the VCO integrator and feeding it further down the loop, we showed that high linearity and higher-order noise-shaping shaping could be achieved extremely power-efficiently. The prototype achieved 3rd-order noise-shaping with a 92.1 dB SNDR and a peak linearity of 123 dB while consuming only 4.4 µW. This led to a Schreier FoM of 179.6 dB, indicating how efficient the proposed structure is and showing comparable performance to standard voltage domain architectures. These VCO-based ADCs have been mostly designed for high-speed applications with MHz bandwidth but have started showing their potential for lower bandwidth sensor nodes thanks to their supply insensitivity, infinite DC gain, and compact area. However, many challenges are associated with designing high dynamic range (DR) ADCs using VCO-based integrators as they have limited intrinsic linearity and require a large oversampling ratio due to being limited to 1st-order noise shaping.This dissertation presents several innovations at the circuit and architecture level that can increase the noise-shaping order of VCO-based ADC and achieve outstanding linearity. These techniques were integrated into two prototype chips: 1) an ADC for the direct-digitization of biopotential signals and 2) a purpose sensor front-end ADC for ultra-low-power IoT nodes. The first prototype is intended to be used for wearable continuous health monitoring. It was designed to interface directly with high-impedance recording electrodes and provide a wide dynamic range and linearity to absorb motion artifacts and correct them in the digital domain. The prototype ADC achieves 2nd-order noise-shaping with high linearity and power efficiency using a novel GIRO-based time-to-digital converter and a multi-quantizer scheme. The ADC achieves a dynamic range greater than 90 dB and above 110 dB of linearity while consuming only 5.4 μW of power. This corresponds to a Schreier Figure of Merit (FoM) of 174.7 dB, which was state-of-the-art for VCO-based ADCs at the time of publication. The second prototype was developed by building upon the feedforwarding techniques commonly used in the standard voltage domain ADC architectures and applying them to capacitively coupled VCO-based ADCs. Using the pseudo-virtual ground (PVG) at the input of the VCO integrator and feeding it further down the loop, we showed that high linearity and higher-order noise-shaping shaping could be achieved extremely power-efficiently. The prototype achieved 3rd-order noise-shaping with a 92.1 dB SNDR and a peak linearity of 123 dB while consuming only 4.4 μW. This led to a Schreier FoM of 179.6 dB, indicating how efficient the proposed structure is and showing comparable performance to standard voltage domain architectures.

Advances in semiconductor technology over the last few decades has caused an influx of electronic devices into our daily lives, leading to the emergence of the Internet-of-Things (IoT) era. The IoT is a cluster of many miniaturized devices (also called sensor nodes) that unobtrusively capture data from our lives and surrounding environment to improve our quality of life. The IoT is expected to have a transformative impact on a wide variety of applications ranging from biological sensing such as wearable electrocardiogram-recording (ECG) to track our well-being, to physical sensors for industrial and environmental monitoring, to entertainment and infrastructure related devices, such as audio devices, for smart-homes and smart-cities.

From a circuit design perspective, enabling the IoT requires overcoming an important technological hurdle: maximizing energy efficiency. With many of these nodes requiring uninterrupted seamless operation, a small form-factor, an unobtrusive or remote location, and high longevity, there are severe constraints on the power source (e.g., battery, energy harvester, etc.). Henceforth, enhancing the power efficiency is, by-far, the key challenge to be addressed for the practical deployment of such IoT sensor nodes.

Generically speaking, a typical IoT sensor node comprises two basic building blocks: 1) an analog front-end (AFE) with amplifiers and data-converters and, 2) a transmitter for wireless communication. Most AFEs for IoT applications need to amplify/acquire low bandwidth signals while introducing minimal circuit noise. Power efficiency is fundamentally limited by noise for these AFEs. Since many IoT transmitters only need to communicate to a nearby base-station, such as smartphone or smartwatch, the output power Pout delivered to the antenna is often low. Power efficiency is limited by frequency synthesis considerations for these transmitters. In this dissertation, multiple circuits and techniques to enhance the power efficiency of the aforementioned IoT blocks are proposed. These are demonstrated by three prototype chips, namely: 1) an amplifier for implantable ECG recording, 2) a data-convertor for precision audio, and 3) a transmitter for short-range, narrowband communication.

The ECG amplifier is intended for implantable recording. There is significant interest in implantable devices, in general, due to their unobtrusive nature, improved environmental artifact tolerance, and that some biological signals can be only be obtained in vivo. However, these are also associated with very stringent power budgets of only a few nanowatts (nWs). An ultra-low power, 13.9 nA ECG amplifier is first described. This work achieves state-of-the-art noise-efficiency and power-efficiency factors of less than unity, which correspond to ~3× improvements over prior sub-100-nW amplifiers. The key enabling idea, also the main contribution of this work, is an operational transconductance amplifier (OTA)-stacking technique that fundamentally improves the noise efficiency of noise limited amplifiers.

Next, the OTA-stacking technique was expanded for use in oversampling analog-to-digital converters (ADCs). This ADC is intended for audio devices for entertainment, smart-homes, automobiles, etc. where continuous-time delta-sigma modulators (CTΔΣMs) are often the power bottleneck for such devices. These ADCs need high dynamic range (DR), which is challenging with the power constrains associated with portable sensor nodes. Several techniques such as finite impulse response (FIR) feedback, 4-stage feedforward op-amp, tail-less operation, and OTA-stacking were integrated into a 3rd-order CTΔΣM to achieve near state-of-the-art performance. The ADC achieved >100 dB DR while consuming only 121 μW with a 2.1 dB improvement in the Scherier’s Figure of Merit (FoM) due solely to the OTA-stacking.

Lastly, a narrowband transmitter is reported for short-range wireless communication (<2 meters) over the 400 MHz MedRadio-band. Enabling the interconnection functionality for the IoT devices while being power-efficient is another critical challenge. A process, voltage, and temperature (PVT)-robust frequency synthesis technique using a crystal oscillator integrated with a passive polyphase filter was demonstrated. A state-of-the-art global efficiency of 27% at -17.5 dBm Pout and low power of 67 μW compared to prior sub-1 mW transmitters was achieved.

Since the early 1970’s, flow cytometry has been an essential biomedical tool for measuring and quantitatively analyzing cells, its applications ranging from hematology to identifying prognostic indicators for cancer, HIV and other time dependent markers of disease activity. Developing countries are at a greater risk of disease, where diagnosis is delayed due to lack of advanced resources. A W.H.O. study reveals that more than 80% of the patients in these countries are already have cancer progressed to advanced stages, at the time of diagnosis. Timely detection of these biomarkers can have a huge impact on the treatment outcome and ultimately the survival rate while simultaneously reducing the economic burden.

Despite the advancements in optical and impedance based flow cytometers for diagnosis, they are limited by a poor readout with high background noise, dependence on cell suspension matrix and photo-bleaching. Magnetoresistance (MR) biosensors overcome all of the above limitations with applications in point-of-care settings. However, prior to developing the MR flow cytometer, it is necessary to model this system based on multiple parameters like the size of the magnetic nanoparticles, applied magnetic force and hydrostatic pressure. As part of this thesis, we optimized the sensing range mathematically and have estimated that a single magnetic bead about 4.5 µm in diameter can be detected by the sensor, while generating a signal as high as 600 mOhms. Microfluidics is incorporated to ensure close contact with the sensor surface with a minimal loss of signal due to diffusion.

Over the past several decades, early diagnoses and disease monitoring that rely upon biomolecular testing are the primary factors that have led to the substantial increase in average life expectancy. Molecular tests, which analyze patient samples for disease-specific biomarkers, are becoming the basis of the majority of diagnoses and therapy monitoring. Point-of-care (PoC) diagnostics uses a portable analytical device for accurate and fast tests to avoid frequent clinic visits and long turn-around time. Among biosensing techniques, magnetic sensors take advantage of the intrinsic lack of magnetic background in biological samples to achieve high sensitivity and are compatible with semiconductor-based fabrication processes to enable low-cost and small-size devices for PoC applications.

In this dissertation, magnetic sensor analog front-ends (AFEs) are designed to measure the signal from magnetoresistive (MR) sensors and overcome challenges such as small signal to baseline ratio, 1/f noise, and temperature drift. Two sensing techniques, magnetometry and magneto-relaxometry (MRX), are discussed and compared. Printed circuit boards (PCBs) and CMOS chips are designed to implement both techniques.

First, a CMOS chip based on magnetometry is presented, which reduces the baseline using a double modulation scheme and a reference sensor. The residual baseline from the sensor mismatch is further reduced using a high frequency interference rejection (HFIR) sampling technique embedded in the ADC. A fast settling duty-cycled resistor (DCR) is used to reduce the AFE settling time, thus enabling a readout time that is 22.7× faster than the state-of-the-art. This work results in sub-ppm sensitivity and a sensor mismatch tolerance of up to 10%.

While promising, the sensor mismatch still limits the baseline cancellation. MRX measures the relaxation signal after removing the excitation magnetic field, thus enabling baseline-free detection. PCBs, including an AFE and an electromagnet driver that can collapse the magnetic field within 10 μs, were designed to validate the time-domain MRX. The signal dependency on the sensor coverage, applied field strength, and magnetization time was investigated.

Lastly, a CMOS chip based on MRX was designed that uses magnetic or magnetoresistive correlated double sampling to reject the systematic 1/f noise. Moreover, a fast settling Miller compensation (FSMC) technique was presented to save the power, while maintaining the amplifier’s linearity and stability. As a result, this work achieves the best-reported magnetic sensor figure-of-merit (FoM).

These works enable ultrasensitive, broad dynamic range, and fast response magnetic sensing systems towards PoC diagnostics.

In the contemporary era, sensors have become ubiquitous, permeating various facets of our daily lives and profoundly impacting society, industry, and the environment. The Internet of Things (IoT) and biosensors represent two broad categories of sensors. IoT sensors, equipped with wireless communication capabilities, facilitate real-time data collection and transmission from remote locations, enabling continuous monitoring and analysis of physical and environmental parameters. On the other hand, biosensors leverage biological recognition elements to detect specific analytes, ranging from biomolecules to pathogens, with high sensitivity and specificity. Integrated circuits are a primary link between all these applications. Analog front-ends are critical in accurately converting physical information into digital formats, facilitating further processing and analysis.From a circuit design standpoint, CMOS technology scaling poses fresh obstacles in analog design owing to the reduced supply voltage and transistors' reduced inherent voltage gain. These challenge analog circuit designers as they reduce the signal swing and attainable signal-to-noise ratio (SNR), leading to increased power consumption. Simultaneously, while device speed has increased in lower design nodes, its direct advantage for analog circuit design remains limited. This thesis introduces digital and technology-friendly circuit architectures through time-domain circuit techniques adept at minimizing area and power consumption while leveraging the accelerating transistor speeds. This work describes three examples of how this can be achieved, demonstrating the versatility of the approach by applying it to different sensors. First, a high-performance, low-power temperature sensor suitable for wireless IoT devices/RFID tags is described. The system utilized a mostly digital approach to achieve energy- efficient, sub-μW operation with a resistor-based temperature sensor. A sampled, incomplete- settling, switched-capacitor-based Wheatstone bridge was read out using a digital frequency- locked loop (DFLL) while harnessing the quasi-periodic limit cycles to reduce in-band noise. Implemented in a 65 nm CMOS process, it consumed 310 nW and achieved 9.8 mK resolution in a 10 ms conversion time. This resulted in a 297 fJ·K2 figure-of-merit (FoM) and low energy (3.1 nJ/meas.). Next, a 16×20 CMOS biosensor array-based on electrochemical impedance spectroscopy (EIS) is presented. This high-density system implemented a polar-mode detection scheme with phase-only EIS measurement over a 5 kHz – 1 MHz frequency range. The design featured predominantly digital readout circuitry, ensuring scalability with technology, along with a load- compensated TIA at the front, all within a 140×140 μm2 pixel. The architecture enabled in-pixel digitization and accumulation, which increases the SNR by 10 dB for each 10× increase in readout time. Implemented in a 180 nm CMOS process, the 3×4 mm2 chip achieved state-of-the-art performance with an rms phase error of 0.035% at 100 kHz through a duty-cycle insensitive phase detector. Lastly, an 8-channel, in-pixel 2nd-order ΔΣ ADC is presented for the direct digitization of neural recording signals in a closed-loop neuromodulation system. This paper addresses the stimulation artifact recovery time in voltage-controlled oscillator (VCO)-based quantizers with a fast-recovery, overrange-detecting phase quantizer. The ADC incorporates a pseudo virtual ground feedforwarding (PVG FF) technique and a complementary input Gm-C filter with per-pixel decimation. It supports four recording modes covering 2.5–20 kSps through a power-efficient, bandwidth-scalable continuous time ΔΣ modulator. Fabricated in a 180-nm CMOS process, this 300×300 μm2 ADC achieves the fastest (0.05-0.4 ms) stimulation artifact recovery time, enabling in-stimulation recording. Recording with artifact tolerance was demonstrated through an in vivo whisker barrel rat experiment.

As a result of numerous advances towards miniaturization in several diverse fields including chemistry, nanofabrication, microfluidics, and electronics, point-of-care (PoC) biosensors have become a promising tool to combat the most life-threatening and expensive health issues affecting the world today. PoC technology helps solve these problems by allowing for diagnostic tools typically restricted to centralized facilities to be brought closer to the point of diagnosis for faster and more frequent testing in both clinical and remote settings. While many biosensor types exist, electrochemical-based detection has the advantage that it is inherently compatible with circuits, requiring only electrodes for transduction, allowing it fully to benefit from both Moore’s Law scaling and the well-established semiconductor manufacturing industry to produce miniaturized, cost-effective, and portable devices. However, there has been a lack of successful PoC electrochemical platforms capable of running multiple diagnostic tests or multi-analyte assays due to the difficultly of balancing power and area constraints of the circuitry with maintaining the required sensitivity.

Therefore, in this dissertation, the circuit and system design of two electrochemical biosensor platforms are presented that explore the challenges of implementing both multi-technique and multi-analyte biosensors at the PoC. The first is a reconfigurable, multi-technique electrochemical biosensor designed for direct integration into smartphone technologies to enable personal health monitoring. By repurposing components from one mode to the next, the biosensor is able to efficiently reconfigure itself into three different measurement modes allowing it to run a variety of assays. Each distinct mode is able to match the performance of state-of-the-art single technique biosensors, while all being integrated onto a single device at a fraction of the size. The 3.9×1.65 cm2 module was used with a modular smartphone for a variety of real-world point-of-care applications.

Scaling the sensors further for high-density multi-analyte testing, a 4,096-pixel electrochemical biosensor array in 180 nm CMOS is presented. It uses a coulostatic discharge sensing technique and interdigitated electrode (IDE) geometry design to reduce the size of the readout circuitry. Each biopixel contains an IDE with a 13 aA low-leakage readout circuit directly underneath. Compared to standard electrodes, the implemented IDEs along with their inherent 3-D trenches achieve an amplification factor of 10.5× from redox cycling. The array's sensor density is comparable to state-of-the-art arrays, all without augmenting the sensors with complex post-processing. The simultaneous detection of anti-Rubella and anti-Mumps antibodies in human serum is demonstrated.

Current measurement front-ends are widely used to provide a high precision, real-time signal acquisition for biological applications where charge perturbations occur during biological interactions. The requirement of the high dynamic range in front-ends has become imperative for high sensitivity biosensors; however, designing front-ends with high dynamic range is challenging in advanced CMOS process nodes with reduced supply voltages where the minimum and maximum detectable signals are determined by circuit noise and power supply voltage, respectively.

In this dissertation, I present several ultra-low noise current measurement front-ends for biosensing applications that aim to address this issue. The first work was designed for nanopore-based DNA sequencing. A hybrid semi-digital transimpedance amplifier senses the minute current signatures introduced by single-stranded DNA (ss-DNA) translocating through a nanopore, while discharging the baseline current using a semi-digital feedback loop. The amplifier achieves fast settling by adaptively tuning a DC compensation current when a step input is detected. A noise cancellation technique reduces the total input-referred current noise caused by the parasitic input capacitance. The amplifier has 31.6 MΩ mid-band gain, 950 kHz bandwidth, and 8.5 fA/√Hz input-referred current noise, a 2× noise reduction due to the noise cancellation technique. This system is demonstrated by capturing ssDNA translocation events.

The second front-end is a new current-input analog-to-digital converter (ADC) architecture, an asynchronous Hourglass structure that provides both low-noise amplification while decoupling the maximum detectable signal from the supply voltage, and first-order quantization noise-shaping. By eliminating the need for the reset switch in a capacitive transimpedance amplifier (C-TIA) and the feedback digital-to-analog converter in a delta-sigma modulator and compensating the excess loop delay, this Hourglass ADC achieves over 160 dB dynamic range (sub-pA to >10 µA), sub-pArms input-referred noise, and a conversion time of 400 ms – 2.5× faster than the state-of-the-art.

The linearity and power efficiency of the Hourglass ADC is further improved when implementing the ADC in a closed loop structure where a predictive I-DAC provides a coarse estimate of the current and the Hourglass ADC processes only the residue. A calibration technique is proposed to optimize the power consumption in the C-TIA and improve the current-to-frequency (I-to-F) linearity. This closed-loop Hourglass ADC achieved Shreier FOM of 197 dB with a 7 ppm linearity error over a 160 dB dynamic range from 100 fA to 10 µA.

Facing unprecedented population-ageing, noncommunicable diseases (NCDs) have become the primary risk of death. According to the World Health Organization (WHO), more than 80% of deaths are caused by NCDs in countries where at least 20% of the population is over 60 years old. Inevitably, the growing impact of NCDs necessitates changes to the contemporary healthcare system that was designed many decades ago. One of the key factors of NCD management is to transition diagnostics from centralized laboratories closer to the patient in point-of-care (PoC) settings. PoC settings provide high effectiveness, low cost, easy access, and fast turnaround, PoC diagnostics exhibits timely detection and treatment monitoring of cancers where early detection has a huge impact on the treatment outcome and survival rate while simultaneously reducing the economic burden. Optical-based instrumentation is still the workhorse in clinical diagnostics, however, such instrumentation requires complex optics, lasers, and photodetectors making it hard to translate to the PoC. To address cancerous detection for NCD control, a magnetic biosensor provides an alternative platform for PoC-friendly settings like rapid turnaround time and miniaturization without the loss of sensitivity.

In this dissertation, magneto-biosensing techniques for cellular and molecular assays are presented. We developed a magnetic flow cytometer (MFC) using a giant magnetoresistive (GMR) biosensor and matched filtering to perform aptamer-based cellular assays. This work established the strategy of system design for dynamic throughputs and improved the accuracy to 95%. We extended the results to detect pancreatic cancer cells with over-expressed epidermal growth factor receptor (EGFR). The magnetic measurements were highly correlated with optical signal, revealing the future clinical potential. In terms of molecular detection, we implemented time-domain magnetorelaxometry (MRX) on GMR devices. An ultrafast electromagnet was designed to minimize the deadzone and allow the investigation of Néel relaxation. The effect of the applied magnetic field and magnetization time were explored to understand the relaxation process. The results showed excellent agreement with the empirical trend describing the relaxation based on natural-log behavior. We used these findings to optimize the system and perform a proof-of-principle magnetic immunoassay, the first time that GMR sensors have been reported for an MRX bioassay.