This work examines the efforts pursued to extend the bandwidth of InP-based DHBTs above 1 THz. Aggressive lithographic and epitaxial scaling of key device dimensions and simultaneous reduction of contact resistivities have enabled increased RF bandwidths by reduction of device RC and transit delays. A fabrication process for forming base electrodes and base/collector mesas of highly scaled transistors has been developed that exploits superior resolution (10nm) and alignment (<30nm) of electron beam lithography. Ultra-low resistance, thermally stable base contacts are critical for extended fmax bandwidth: a novel dual-deposition base metalization technique is presented that removes contaminating lithographic processes from the formation of the base contact, thereby enabling low resistivity contacts (4 Ω-µm²) to ultra-thin base layers (20 nm). The composite base metal stack exploits an ultra-thin layer of platinum that controllably reacts with base, yielding low contact resistivity, as well as a thick refractory diffusion barrier which permits stable operation at high current densities and elevated temperatures. Reduction in emitter-base surface leakage and subsequent increase of current gain was achieved by passivating emitter-base semiconductor surfaces with conformally grown ALD Al2O3. RF bandwidth limiting parasitics associated to the perimeter of highly scaled transistors have been identified and significantly reduced, among which are high sheet resistance of base electrodes, excess undercut of emitter stripes and improperly scaled base posts. At 100nm collector thickness , the breakdown voltage of the transistor BVCEO has been increased to more than 4.1V by passivating base/collector surfaces.

With the technology improvements discussed, transistors with ft of 480 GHz and fmax in excess of 1 THz have been demonstrated at 200nm emitter width and 80nm single-sided base contact width. Transistors at the same emitter width, but 30nm base contact width exhibit ft of 550 GHz and fmax of 850 GHz. Estimations from a finite element model predict higher bandwidth on smaller footprint transistors. However, inadequacies of RF calibration structures prevent fmax extraction on these devices.