UC San Diego

Unavoidable mismatches among the components in 1-bit DACs cause both static and dynamic errors in the 1-bit DAC output waveforms. When the 1-bit DACs are used to construct multi-bit continuous-time DACs the static and dynamic errors cause second- and higher-order distortion terms in the overall DAC output. Chapter 1 shows that dynamic element matching (DEM) converts a portion of the second-order distortion term, and all of the higher-order distortion terms into noise that limits the DAC’s SNR. The remaining second-order distortion term is caused by a type of dynamic error called inter-symbol interference (ISI). Chapter 2 proposes a technique called ISI scrambling which is a simple add-on to DEM that prevents the 1-bit DAC ISI errors from producing second-order distortion in the DAC output. Measurement results from a prototype 1-GS/s 14-bit DAC implemented in a 90 nm CMOS technology closely match the mathematical analysis of ISI scrambling that is presented in the chapter. Chapter 3 proposes a technique called reduced noise DEM (RND) which pre-vents nonlinear distortion caused by static 1-bit DAC mismatch errors like DEM. The RND technique reduces the noise in the DAC output caused by static 1-bit DAC mismatch errors provided information about the mismatches is available.