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Open Access Publications from the University of California

Behavioral modeling of DRACO : a peripheral interface ASIC

  • Author(s): Gupta, Rajesh
  • Dutt, Nikil D.
  • et al.

This paper describes the behavioral modeling of DRACO, a peripheral interface Application Specific Integrated Circuit (ASIC) developed by Rockwell International for numerical control applications. The behavioral model was generated from a data sheet of the fabricated chip, which primarily described the chip's input-output functionality, physical and operational characteristics, and a functional block diagram. The data sheet contained very little abstract behavioral information. This report describes the abstract behavioral model of the DRACO chip, and uses flowcharts and VHDL to capture the behavior. The behavioral model was developed through reverse engineering of the data sheet description, supplemented by further consultation with designers of the DRACO ASIC at Rockwell Intemational. The report describes typical behavioral test sequences that were applied to the DRACO VHDL model to verify its correctness. The appendices contain the original DRACO datasheet and the VHDL code used to capture DRACO's behavior.

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