UC Berkeley

Power electronics design best configures available electrical devices—transistors, inductors, and capacitors—to realize a theoretical power conversion function in the smallest, lightest, cheapest, and most efficient manner. In particular, hybrid switched-capacitor converters are a contemporary and high-performance class of circuit topology utilizing both inductors and capacitors. To better understand how these converters behave and are realized in practice, this manuscript will explore several contributing design aspects—modeling, passive devices, and practical printed circuit board layout—applied to a particular circuit topology of active research interest.

First, the thesis will explore the results of a comprehensive survey of commercial passive components and how their figures-of-merit might be used to inform converter design. The survey explores the capabilities of prominent types of discrete capacitors and inductors. Then this manuscript applies this survey to the design of an aluminum electrolytic capacitor bank on the dc-link of a single-phase power conversion system.

Second, this thesis analyzes dynamical modeling for the flying capacitor multilevel (FCML) power converter, a topology with nearly inexhaustible switching state combinations. It presents a simplified derivation and abstraction of a conventional averaged Fourier-derived model for this FCML switching-circuit topology, and it provides extensions to existing work and explores design implications. Next, this manuscript outlines a methodology for deriving a functional, accurate, and computationally efficient discrete-time state-space dynamical model for the FCML converter; this model is validated with results measured from a high-performance hardware prototype.

Finally, the thesis investigates the usage of multilevel converters to demonstrate the underlying feasibility of the single-stage buck-type power factor correction (PFC) rectifier. A high-performance multilevel converter prototype is developed with an especial focus on compactness, high efficiency, and low-inductance layout in the switching commutation loops. Then the theoretic input current harmonics, power factor, and total harmonic distortion of the buck PFC are derived and compared to the prevailing regulatory IEC current emission standards.