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A generalized tree-structured DEM DAC and enhanced harmonic distortion correction in pipelined ADCs

  • Author(s): Rakuljic, Nevena
  • et al.
Abstract

The first chapter of this dissertation discusses the tree- structured dynamic element matching (DEM) technique for unity-weighted, multi-bit digital to analog converters (DACs). In general, mismatches in nominally identical components of a unity weighted multi-bit DAC introduce non -linear distortion at the output of the DAC. For this reason, a DEM encoder is usually employed in the implementation of unity weighted multi-bit DACs, which objective is to permute the inputs to the nominally identical components of the DAC, so that the non-linear distortion at the output is avoided or at least minimized. The best among such DEM techniques is the tree structured DEM technique. However, prior to the work presented in Chapter 1, this technique could not be applied to unity- weighted multi-bit DACs with a number of components that is not a power of two. The second chapter of this dissertation focuses on the topic of digital calibration of residue amplifiers in pipelined analog to digital converters (ADCs). Pipelined ADCs provide a high resolution digital representation of analog input signals. In recent years, many digital calibration techniques have been developed that enable the design of pipelined ADCs with low-power analog components that behave nonideally. One such digital calibration technique is Harmonic Distortion Correction (HDC) which compensates for the non- ideal residue amplifier behavior. This technique is the best digital calibration technique known to the authors that addresses the problem of residue amplifiers. Nevertheless, the HDC technique, when implemented in the pipelined ADC, cannot accurately eliminate errors introduced by residue amplifiers under all pipelined ADC's input conditions. In particular, the problem in the implementation of the HDC technique arises due to the leakage of quantization error from the stages subsequent to the calibration stage. Chapter 2 presents an analysis of this problem and an all-digital solution which enables the HDC technique to properly operate regardless of the input signal level. The third chapter of this dissertation analyzes the number of samples that need to be averaged by the HDC algorithm in order to reliably estimate, and therefore eliminate, the residue amplifier errors from the pipelined ADC's output

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