In this report, we discuss the various issues and problems associated with ASIC reuse. We describe the different models of communication between components and the essential issues in interfacing ASICs that use different communication protocols. We come up with guidelines that help in modeling for reuse. We also propose a new HDL, SpecC, that has the desirable characteristics for co-designing systems. This language is suited for ASIC reuse and overcomes the limitations of VHDL.
