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Open Access Publications from the University of California

Design exploration for pipelined IDCT


ASICs for video compression systems have stringent timing requirements. For example, according to the MPEG standard, the throughput of the MPEG decoder is 30 frames per second. This performance cannot be achieved without efficient pipelining. In this report, we explore the pipelined designs for the Inverse Discrete Cosine Transform (IDCT) which is a critical part of the MPEG decoder. We also transform the algorithm to minimize the memory requirement. We have implemented both the original and memory-optimized algorithms at the RT level, using our realistic library.

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