Skip to main content
Open Access Publications from the University of California

VLSI design of the tiny RISC microprocessor


This report describes the Tiny RISC microprocessor designed at UC Irvine. Tiny RISC is a 16-bit microprocessor and has a RISC-style architecture. The chip was fabricated by MOSIS [1] in a 2μm n-well CMOS technology. The processor has a cycle time of 70 ns.

Main Content
For improved accessibility of PDF content, download the file to your device.
Current View