UC San Diego

Exploring advancements in implantable neural recording systems stands as the cornerstone of this research endeavor. This thesis presents a comprehensive exploration into the development of advanced implantable neural recording systems. Three novel systems are detailed: a low-power area-efficient Neural Recording System for high-density neural implant applications, a digitally-assisted multi-channel neural recording system, and a multi-channel bidirectional neural recording and stimulation system on chip (SoC).The first system utilizes a Time Division Multiple Access (TDMA) method, achieving simultaneous recordings from 16-neural electrodes. Employing a Least Mean Squares (LMS) algorithm and a single-tap digital adaptive filter (AF), it successfully cancels slowly varying electrode offsets, offering an integrated on-chip solution with high per-channel power and area efficiency. The second system leverages a chopper-stabilized TDMA scheme, significantly reducing integrated noise across various neural signal bands. Furthermore, it introduces an impedance booster module based on a Sign-Sign Least Mean Squares (LMS) adaptive filter (AF), enhancing the AFE input impedance while saving area and power. The third system employs a 16-channel recording TDMA scheme coupled with a novel power and area-efficient stimulation artifact canceller module using an Infinite Impulse Response (IIR) recursive Least Squares (RLS) adaptive filter (AF). Detailed comparisons and analyses of various approaches for artifact suppression are provided. The systems are designed and fabricated in 65nm CMOS technology, offering competitive per-channel area and power consumption while achieving low input-referred noise levels over specific action-potential (AP) and local-field potential (LFP) bands while maintaining high noise efficiency factor (NEF). This thesis not only presents cutting-edge neural recording advancements but also evaluates their performance, paving the way for future developments in neural interfacing technology.