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Modeling and Analysis of Switched-Capacitor Converters with Finite Terminal Capacitances

Abstract

In pre-existing analytical models of switched-capacitor (SC) converters, input and output capacitances (Cin and Cout) have long been neglected based on the assumption of input and output as ideal voltage sources. However, this paper reveals that, in practical applications, the terminal capacitances are usually not sufficiently large to ensure ideal input and output behavior and can have considerable effects on output impedance Rout and overall efficiency. To quantitatively investigate their effects, this paper proposes a general modeling and analysis methodology for SC converters that is capable of considering the effects of finite Cin and Cout. The proposed model is verified by experimental measurements from a 2-to-1 SC converter prototype with less than 8% relative error. It is revealed that the insufficiency of Cin can lead to a considerable increase in Rout and thus harms overall efficiency. On the contrary, smaller Cout can help reduce Rout, although this benefit comes at the cost of larger output voltage ripple. In addition, Cout has stronger effects on Rout in the slow switching region, while Cin is more influential at higher switching frequency, especially around the knee of the Rout curve at which the converter usually operates. Several design guidelines are provided based on these findings.

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