UCLA

Charge-trap transistor (CTT) is a novel non-volatile memory (NVM) technology suitable for both digital and analog applications. In this thesis, we focus on the optimization of CTT to be used as an analog NVM memory element for vector-matrix multiplication for artificial neural network inference. Three important aspects of CTT operation are identified and evaluated. First, we investigate noise-induced fluctuation during read operation both before and after a programming event. Results show that fluctuation of CTT has an insignificant impact on its operation. Second, data encoding precision is studied and characterized. We develop a new programming protocol to improve encoding accuracy and compare it with the previous scheme. Furthermore, we focus on characterizing the long-term retention of CTT devices. Experiments are performed to characterize retention at both room temperature (RT) and 85℃ conditions. We then optimize the programming protocol to improve retention characteristics.