UC Santa Barbara

InP/InGaAs/InP double heterojunction bipolar transistors (DHBT) have been designed for increased bandwidth digital and analog circuits, and fabricated using a conventional mesa structure. These devices exhibit a maximum 450 GHz f,tau and 490 GHz f,max, which is highest simultaneous f,tau and f,max for any HBT. The devices have been scaled vertically for reduced electron collector transit time and aggressively scaled laterally to minimize the base-collector capacitance associated with thinner collectors. The DC current gain beta is ~ 40 and BVCEO = 3.9 V. The devices operate up to 25 mW/um^2 dissipation (failing at Je = 10 mA/um^2, Vce = 2.5 V, delta T,failure = 301 K) and the there is no evidence of current blocking up to Je = 12 mA/um^2 at V,ce = 2.0 V from the base-collector grade. The devices reported here employ a 30 nm highly doped InGaAs base, and a 120 nm collector containing an InGaAs/InAlAs superlattice grade at the base-collector junction.