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A flexible DSP block to enhance FPGA arithmetic performance.

  • Author(s): Parandeh-Afshar, H
  • Cevrero, A
  • Athanasopoulos, P
  • Brisk, P
  • Leblebici, Y
  • Ienne, P
  • Editor(s): Bergmann, NW
  • Diessel, O
  • Shannon, L
  • et al.

Published Web Location

http://www1.cs.ucr.edu/faculty/philip/papers/conferences/fpt09/fpt09-fpctppg.pdf
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