UC San Diego

This research focuses on the design of silicon based millimeterwave integrated circuits for Multi Giga bits-per -second wireless communications. The use of Active sub- harmonic Mixers(ASHM) and Passive Sub-harmonic Mixers (PSHM) for millimeterwave receivers was explored for their advantages over fundamental order mixers. A multi-phase active sub-harmonic mixer/downconverter with an on-chip integrated ring Voltage Controlled Oscillator(VCO) was designed for millimeterwave wireless systems in a in a 0.12 \[mu\]m SiGe BiCMOS technology. Analysis to understand the switching currents in the ASHM was carried out. Useful insight on the behavior of the ASHM was obtained from this. The downconverter exhibited state-of-the-art measured performance in terms of gain and noise figure. A 24 GHz PSHM based downconverter was designed in a in a 0.13 \[mu\]m CMOS technology. This topology combines the advantages of the fundamental order passive mixer such as low 1/f noise and linearity as well as those of sub- harmonic mixer such as low DC offsets due to reduced LO self-mixing. Analysis to understand the operation of the mixer was carried out. The downconverter included am active phase-splitter, a low-noise amplifier (LNA) and LO and IF buffers. Based on the PSHM topology a direct- conversion I/Q receiver was designed. It included a novel active balun with improved amplitude and phase balance. The necessary LO phases were generated using an 8-phase generator which included a quadrature VCO. The measured receiver gain is 12 dB. Noise Figure is 7.4 dB, input IIP₃ is -6 dBm, and input IIP₂ is 18.5 dBm. The RF and the IF sections of the chip consumes 48 mA, and the LO sections consume 40 mA from a 1.6V supply.