Coprocessor codesign for programmable architectures
Embedded systems present a tremendous opportunity to customize the designs by exploiting the application behavior. Shrinking time-to-market, coupled with short product lifetimes create a critical need for rapidly explore and evaluate candidate System-on-Chip(SOC) architectures. Recent work on language driven Design Space Exploration (DSE) uses Architecture Description Language (ADL) to capture the processor-memory architecture and generate automatically a software toolkit for that architecture. We present in this report an ADL-based approach to explicitly capture the coprocessor configuration, and perform exploration of the coprocessor architecture along with processor and memory subsystem. We present a set of experiments using our coprocessor-aware ADL to drive the exploration of the TI C6x processor-memory architecture in the presence of coprocessors, demonstrating a range of cost and performance attributes.