UC Irvine

The phase-locked-based frequency synthesizer, essential in wireless transceivers (TRXs), introduces phase noise and jitter, undermining digital communication link performance. This thesis analyzes the impact of the communication-link noise, phase-locked loop (PLL) phase noise, and circuit non-linearity on TRX's key parameters such as out-of-band emission (OOBE), error-vector magnitude (EVM), and bit-error-rate (BER) for prevalent digital modulation schemes. Phase noise and jitter characteristics for generic integer-N and fractional-N PLLs, as a local oscillator (LO) for an RF mixer, are derived, while accounting for reference spurs, mixer cyclo-stationarity, and additive noise in communication links. Utilizing a comprehensive jitter model and detailed circuit non-linearity model, their impact on digital modulation schemes is investigated. Analyzing M-ary phase-shift keying (M-PSK) and $4^M$ quadrature amplitude modulation ($4^M$QAM), the resulting degradation in key metrics is evaluated. The developed analytical models' accuracy is confirmed through meticulous comparison with system-level simulations, affirming their reliability. In essence, this thesis presents a comprehensive exploration of the system's non-idealities on a generic transceiver's performance. Additionally, this research advances the designers' understanding and equips them with valuable insights crucial for optimizing the performance of wireless transceivers in the presence of inevitable non-idealities.