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Open Access Publications from the University of California

VLSI Design and Verification of the Imagine Processor

  • Author(s): Khailany, Brucek
  • Dally, William J.
  • Chang, Andrew
  • Kapasi, Ujval J.
  • Namkoong, Jinyung
  • Towles, Brian
  • et al.

The Imagine stream processor is a 21 million transistor chip implemented by a collaboration between Stanford Unversity and Texas Instruments in a 1.5V 0.15 micron process with five layers of aluminum metal. The VLSI design, clocking, and verification methodologies for the Imagine processor are presented. These methodologies enabled a small team of graduate students with limited resources to design a high-performance media processor in a modern ASIC flow.

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