UCLA

Controlled heteroepitaxy and integration of arsenide based III-V compounds onto Si surfaces have been an important enabling technology for high efficiency solar cells and light emitters in satellite and optical interconnect applications. However, obtaining high crystal quality III-V compounds on Si, such as GaAs on Si is still challenging: (1) anti-phase domain (APD) boundary formation as the result of the polar GaAs growth on non-polar Si system, (2) a high density of threading dislocations generated by 4.1% lattice constant mismatch, and (3) the 62% thermal expansion coefficient mismatch leading to cracks during the cooling process.

The objective of this research is to obtain arsenide based III-V compounds monolithically integrated onto Si surfaces being APD-free with chemically abrupt GaAs/Si interfaces and possessing excellent optoelectronic properties. Patterned growth scheme by molecular beam epitaxy (MBE) is the approach I undertook to integrate GaAs based III-V compounds onto exactly oriented Si substrates. And the research consists of the following three stages to fulfill the objective.

(1) Precise positioning and low defect density selective area epitaxy for self-assembled/catalyst-free GaAs nanodisks on SiO2 masked exactly oriented Si(100) substrates:

Pure zincblende GaAs nanodisks with precise positioning and low defect density are demonstrated by selective area epitaxy. Defects in the epilayers are reduced by strain relaxation through facets formation and by a lateral overgrowth scheme atop the SiO2 mask.

(2) High-quality and defect-free GaAs thin film on SiO2 masked exactly oriented Si(111) substrates by a two-step growth technique:

Taking advantages of low energy for both Si(111) surface and GaAs/Si(111) interface, the two-step grown GaAs of total ∼175 nm atop patterned Si(111) substrates exhibits atomically smooth surface morphology, single crystallinity and a remarkably low defect density.

(3) Successful integration of InGaAs/GaAs double heterostrucure onto SiO2 masked exactly oriented Si(111) substrates with remarkably reduced thermal stress:

The atomically smooth and high crystalline quality InGaAs/GaAs DH is realized. The confined misfit dislocations at the nucleation layer and nearly threading dislocation-free buffer layer contribute to the atomically sharp GaAs/Si interface. The remarkable reduction in the thermally induced stress corroborates the effectiveness of the square shape pattern design. Optical properties and carrier dynamics are characterized by micro-photoluminescence (µ-PL) and time-resolved PL.