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High-speed, high-resolution digital-to-analog converters


Dynamic element matching (DEM) is widely-used in multi-bit DACs to prevent mismatches among nominally identical components from introducing non-linear distortion. By scrambling the usage pattern of the components from sample to sample, DEM causes the error arising from mismatches to be white or spectrally shaped noise that is free of non- linear distortion. DEM has long been used as a performance -enabling technique in delta-sigma data converters which require low-resolution but high-linearity DACs. More recently, segmented DEM architectures with reduced complexity have been developed that have made high- resolution Nyquist-rate DEM DACs practical CMOS DACs play have been used in many applications. Chapter 1 proves that properly-designed dynamic element matching (DEM) eliminates pulse shape, timing, and amplitude errors arising from component mismatches as sources of non-linear distortion in high-resolution DACs. A set of sufficient conditions on the DEM encoder that ensure this effect, and a specific segmented DEM encoder that satisfies the sufficient conditions are presented. Unlike previously published DEM en-coders, the new DEM encoder's complexity does not grow exponentially with the number of bits of DAC resolution, so it is practical for high-resolution DACs. These analytical results are demonstrated experimentally with a 0.18 [mu]m CMOS 14-bit DAC IC that has a sample- rate of 150 MHz and worst-case, single and two-tone spurious-free dynamic ranges of 83 dB and 84 dB, respectively, across the Nyquist band. In Chapter 2 it is shown that there is a fundamental input range restriction to a segmented DEM DAC, regardless of how the DEM encoder is implemented. A general method of designing DEM encoder for unity-weighted DACs and segmented DEM DACs is then presented. The DEM encoders designed are optimal in the sense that they have a range restriction no worst than that fundamental input range restriction due to segmentation. The methods are demonstrated via examples of a 13-level unity-weighted DEM DAC and a pair of 14-bit segmented DEM DACs. The power dissipation versus complexity tradeoff implied by segmentation is also studied through the 14-bit examples. In chapter 3, a 14-b 100 Ms/s Nyquist-rate DAC using a segmented dynamic element matching technique involving all its DAC elements is demonstrated. The DAC is implemented in 0.18 [mu]m CMOS process and worst-case SFDR across the Nyquist bands are 74.4 dB and 78.9 dB for sample-rates of 100 MS/s and 70 MS /s, respectively.does not grow exponentially with the number of bits of DAC resolution, so it is practical for high-resolution DACs

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