UC Berkeley

Proper utilization of GaN devices generally necessitates ultra-low inductance printed circuit board (PCB) layout in the main commutation loop or switching cell of a power converter. The flying c apacitor m ultilevel ( FCML) t opology in particular contains many of these switching cells, thus design optimization becomes critical. A novel asymmetrical cell layout design with sub-1 nH commutation loop inductance is proposed and characterized for the FCML by utilizing a transient- and impedance-based measurement technique in conjunction with 3D field simulation. To validate its efficacy, this switching cell design is demonstrated within a prototype high performance step-down intermediate bus converter supply (vout = 48 V) with wide input voltage range (vin = 48 to 340 V).