Robust, Reconfigurable, and Power-Efficient Electrophysiological Recording Systems
- Author(s): Karkare, Vaibhav
- Advisor(s): Markovic, Dejan
- et al.
Wireless sensing of electrophysiological signals in day-to-day life, outside the well-controlled clinical or laboratory setting requires the sensor to detect tiny signals (with a resolution of a few μV), while avoiding clipping or saturation for approximately 100mV of non-stationary interferers. A dynamic range of 100dB is required from the analog front end to avoid saturation under the presence of the interferer. At the same time, the sensor is also required to provide a low input-referred noise, making a high-gain, low-noise amplifier indispensable. High gain and high dynamic range are difficult to achieve at the same time with conventional voltage-domain amplifiers, because the output gets limited by the supply voltage. We, therefore, propose to process the input electrophysiological signal in the phase domain, since there is no physical bound on phase. In this work, we directly digitize the input using a VCO-based ADC, that meets the required resolution and input-referred noise constraints for biosignal recording. The proposed front end provides a μV-level resolution for the signal, while maintaining a saturation-tolerance to 200mVp-p interferers, 20-times higher than conventional designs. The power, noise and area of the front end is comparable to that of state-of-the-art biosignal recording systems.
Robust, low-power signal acquisition is just one half of the story of building a power-efficient recording interface. In many cases it is extremely inefficient, if not impossible, to transmit the large amount of data that is collected by the sensor array. High data rate is a particularly acute problem for implantable action-potential recording systems because of their high sampling rates, large number of channels, and stringent power consumption requirements. To solve this problem, we would need to process the data locally and transmit only the computed results. Spike sorting, the process of classifying the recorded action potentials according to their source neurons, is a common post-processing step for action-potential data and provides a significant data-rate reduction. In this work, we used various algorithm and architecture-level techniques to design power-efficient, multi-channel spike-sorting ASICs. These chips consume only a few μW/channel of power and achieve about 200-times reduction in the output data rate, making it possible to support wireless data transmission for multiple channels.
To demonstrate the functionality of this work in a practical use-case scenario, we developed quarter/nickel-sized prototype motes that can allow several hours of wireless biosignal recording. These motes are currently being used for neural recordings from rats by our collaborators in the UCLA neurology department. Future generations of the mote would directly interface to a cellular phone.