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Reducing the pressure on routing resources of FPGAs with generic logic chains.

  • Author(s): Parandeh-Afshar, H
  • Zgheib, G
  • Brisk, P
  • Ienne, P
  • Editor(s): Wawrzynek, J
  • Compton, K
  • et al.

Published Web Location

http://www1.cs.ucr.edu/faculty/philip/papers/conferences/fpga11/fpga11-logic_chain.pdf
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