Donald Bren School of Information and Computer Sciences

Most synthesis systems generate designs from hardware descriptions by relating each language construct to a particular hardware structure. Thus, designs obtained from these systems are dependent on description styles. In other words, semantically equivalent descriptions with different ordering or grouping of conditional and assignment statements, could generate designs with distinctively diff erent cost and performance. This paper introduces a new representation that minimizes the syntactic variance of different description styles. We also propose an algorithm for conversion of hardware descriptions into this new representation. In addition, using this representation for scheduling results in a drastic reduction on the number of control steps required to synthesize the description. Experimental data on severa[ examples show effectiveness ofthe proposed approach.