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Van der Waals Engineering of One-Transistor-One-Ferroelectric-Memristor Architecture for an Energy-Efficient Neuromorphic Array
- Ma, Yinchang;
- Chen, Maolin;
- Aguirre, Fernando;
- Yan, Yuan;
- Pazos, Sebastian;
- Liu, Chen;
- Wang, Heng;
- Yang, Tao;
- Wang, Baoyu;
- Gong, Cheng;
- Liu, Kai;
- Liu, Jefferson Zhe;
- Lanza, Mario;
- Xue, Fei;
- Zhang, Xixiang
Published Web Location
https://doi.org/10.1021/acs.nanolett.4c06118Abstract
Two-dimensional-material-based memristor arrays hold promise for data-centric applications such as artificial intelligence and big data. However, accessing individual memristor cells and effectively controlling sneak current paths remain challenging. Here, we propose a van der Waals engineering approach to create one-transistor-one-memristor (1T1M) cells by assembling the emerging two-dimensional ferroelectric CuCrP2S6 with MoS2 and h-BN. The memory cell exhibits high resistance tunability (106), low sneak current (120 fA), and low static power (12 fW). A neuromorphic array with greatly reduced crosstalk is experimentally demonstrated. The nonvolatile resistance switching is driven by electric-field-induced ferroelectric polarization reversal. This van der Waals engineering approach offers a universal solution for creating compact and energy-efficient 2D in-memory computation systems for next-generation artificial neural networks.
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