Donald Bren School of Information and Computer Sciences

This paper probes the fabrication process critical to DRAM (Dynamic Random Access Memory) chip productivity (the product yield), describes the technical structure and technical issues of the fabrication process, and explores the practice of DRAM trouble management dealing with the issues in situ. Analysis of the processes of DRAM trouble management indicates that the push for micro-miniaturization with extremely small physical tolerances creates a tension between two technical requirements: smaller chip size and higher chip robustness. The tension disturbs the balance among heterogeneous objectives of engineering groups. This suggests that the tension leads to a socio-technical resolution of engineering problems in DRAM fabrication. The study also questions existing assumptions about the control of engineering problem solving practice.