UCLA

Heterogeneous integration is emerging as the mainstay in the performance and scaling enhancement trend. At the Center for Heterogeneous Integration and Performance Scaling (CHIPS), University of California, Los Angeles (UCLA), Silicon Interconnect Fabric (Si-IF) has been established as a heterogeneous wafer-scale integration technology, where bare dies can be mounted on silicon wafer directly with the advantages like fine pitch, small inter-die spacing, lower latency, and higher data bandwidth. As an external communication system for Si-IF, FR4-based periphery connector was investigated earlier but it still has issues such as, CTE mismatch and poor flexibility. To address this problem, Flextrate(TM) Connector, a novel flexible device, is proposed. FlexTrate(TM) is a flexible hybrid packaging platform using fan-out wafer-level packaging method to heterogeneously integrate dies in polydimethylsiloxane (PDMS) substrate. In this thesis, FlexTrate(TM) technology is used to fabricate copper wires on PDMS substrate to form a connector that can serve as an external communication system for Si-IF with better mechanical properties, such as better elongation and lower Young’s modulus.