UC Irvine

Recently, with the broad adoption of mobile devices, considerable research efforts

have concentrated on innovative dynamic optimization techniques to improve

the performance and energy efficiency of applications running

on these resource-constrained devices, in order to meet the needs for better user

experience, more functionalities, and reduced costs. In this dissertation, we

explore the effectiveness, on performance and energy efficiency, of

optimizations that are made possible when a Just-In-Time compiler can

directly compile bytecodes to the internal, flexibly-designed,

implementation ISA, rather than to the external, architectural ISA of

a microprocessor.

We discuss the challenges and present the design and implementation of

a novel acceleration framework to improve the performance-per-watt of

applications written in modern object oriented languages that execute

on managed runtime environments of mobile devices. Our acceleration

framework allows the direct translation of bytecodes into the

implementation ISA of modern co-designed processors, by a JIT

compiler, bypassing the architectural ISA. We develop novel JIT

speculative optimizations by leveraging both the semantically rich

bytecode and the hardware features at the microarchitecture level,

such as hardware support for: a) speculative execution, b) reduced

indirect branches mispredictions, c) efficient call/return, and d)

additional registers, which are not exposed by the microprocessor's

architecture ISA for reasons of ISA compatibility.

We demonstrate the effectiveness of our acceleration interface in

delivering increased performance-per-watt on mobile processors by

providing an in-depth evaluation of two implementations: 1) first,

using a real in-order co-designed processor; and 2) second, using a

modern out-of-order co-designed research processor for the x86

architecture, running on a cycle accurate state-of-art simulator. Our

framework provides the building blocks for the design of innovative

hardware support and speculative optimizations to effectively deliver

the stringent energy and performance requirements of applications running

on mobile processors.