To integrate SiGe into future CMOS devices, it is essential to realize reliable strategies to deposit very thin high-k dielectrics on SiGe surfaces with a low density of interfacial defects. HfO2 was deposited by atomic layer deposition (ALD) using HfCl4 and H2O precursors. The quality of interfaces was varied by ex-situ surface treatment prior to ALD, including HF clean and HF clean followed by wet ammonium sulfide treatment. Electrical properties of the interfaces were examined by variable frequency capacitance-voltage (C-V) spectroscopy. Interfaces passivated by sulfur were found to have nearly 2x smaller density of interface traps than HF-treated interfaces, particularly near the edge of the valence band. The effect of Pd/Ti/TiN as a gettering gate electrode on the electrical characteristics of the interfaces were compared with Ni. By using Pd/Ti/TiN gate electrodes, lower equivalent oxide thicknesses (EOT) were achieved, but no significant improvement in the interface quality was observed.