The demand for the aggregate I/O bandwidth increases rapidly while the number of available I/Os are limited by packaging constraints and cost. Compared with differential signaling, single-ended signaling improves the pin-efficiency and aggregate I/O bandwidth by doubling the data rate per pin and is widely used for inter-processor or processor-memory applications. However, as the date rate increases, inter-symbol interference due to channel nonideality becomes a major issue for signal integrity. Equalizers are usually required for conventional NRZ links for data recovery, which limits the energy efficiency of the wireline transceivers as the data rate scales. Additionally, crosstalk between parallel transmission lines aggravate the signal integrity. In this dissertation, frequency-division multiplexing links are studied for single-ended wireline applications to resolve these issues energy-efficiently.
The first part of the dissertation introduces a dual-lane tri-band single-ended transceiver using PAM-2 modulation. The proposed transceiver effectively alleviates inter-symbol interference and far-end crosstalk between the two transmission lines. The transceiver mitigates inter-symbol interference by enabling a smaller symbol rate and self-equalizing the channel loss variation through the down-conversion process. The transceiver reduces crosstalk by exploiting the characteristic of the channel response and taking advantage of the frequency and phase orthogonality for the coherent PAM modulation. The dual-lane transceiver achieves an aggregate data rate of 24Gb/s with an energy-efficiency of 1.17pJ/bit over two coupled transmission line.
The second part of the dissertation describes a high-throughput low-power 16-QAM single-lane single-ended wireline transceiver. By reducing the symbol rate, most of the building blocks such as the MUX/DeMUX run at only � of the total data rate and therefore the energy-efficiency of these blocks is improved. The self-equalization effect during the down-conversion process reduces the inter-symbol interference. By combining two QPSK modulators to realize 16-QAM modulation, the TX reduces the linearity requirement for most building blocks. The receiver adopts a single-to-differential low-noise amplifier with DC feedback without an external reference. The single-ended transceiver obtained a maximum interface data transfer speed of 32Gb/s/pin with only 28mW power consumed.