Precision timing is a key requirement for emerging 4D particle tracking, Positron Emission Tomography (PET), beam and fusion plasma diagnostics, and other systems. Time-to-Digital Converters (TDCs) are commonly used to provide digital estimates of the relative timing between events, but the jitter performance of a TDC can be no better than the performance of the circuits that acquire the pulses and deliver them to the TDC. Several clock receiver and distribution circuits were evaluated, and a differential amplifier with resistive loads driving a pseudo-differential clock distribution network, developed using design guidelines for radiation tolerance and cryogenic compatibility, was fabricated as part of three prototypes: an analog front-end testbed chip for high-precision timing pixel readout, a dedicated TDC evaluation chip, and a Low-Gain Avalanche Detector (LGAD) readout circuit. Based on TDC measurements of the prototypes, we infer that the jitter added by the clock receiver and distribution circuits is less than 2.25 ps-rms. This performance meets the requirements of many future precision timing systems. The clock receiver and on-chip pseudo-differential driver were fabricated in commercial 28-nm CMOS technology and occupy 2288 µm².

Amorphous Selenium (a-Se) has been extensively studied as a direct conversion detector material for x-ray imaging, and can be readily deposited as uniform layer by thermal evaporation. On the other hand, readout ASICs developed for high-energy physics experiments provide front-end electronics with low noise, high granularity and fast charge readout. Thin film technology to enable large-area, low-cost precision tracking is in turn also of interest to the HEP community. In our initial study presented at SPIE 2023, we verified the fabrication process of the a-Se layer for integration on a CMOS ASIC using the RD53B (ITkpix v.1.0) chip. The hybrid detector concept consists of the pixelated readout ASIC with 50x50µm pixel pitch, a polyimide hole-blocking layer, the active a-Se layer with 15-100 µm thickness, and a gold top electrode layer. In this work, we now present the evaluation of the a-Se detector with an advanced version of the chip, RD53C or ATLAS ITkpix v.2, which provides full time-over-threshold control and functionality and allows operation in self-triggered hit counting mode. We demonstrate the detection of low-energy beta electrons as well as x-rays of energies between 20 and 50 keV with this a-Se/ITkpixv2 assembly. We study the impact of the operation bias voltage of the a-Se layer on the hit rate and signal charge as represented through the time-over-threshold. The charge collection efficiency of the a-Se, as expected, strongly depends on the electric field applied across the layer. This manifests as both higher hit rates when more interactions pass the trigger threshold, as well as increased ToT for larger amounts of collected charge. As this ASIC was originally designed for hybrid silicon pixel detector readout, some operation parameters of the front-end preamplifier circuit were adjusted in data acquisition for more efficient readout of the small charges provided by the thin a-Se layer.