As the development of technology, devices, particularly semiconductor, have scaled down dramatically enabling the high performance of computing systems. However, when examine the entire electronics system, the total dimension is not equally scaled. It is found that magnetic devices are the bottleneck for the dimensional scaling. In this dissertation, several commonly employed methods for reducing the usage of inductors are discussed and compared, including high switching frequency converter, switched-capacitor converter, hybrid converter and resonant converter. Each of these converters has been proved that partially meet the requirement of miniaturized system with fine regulation and high energy efficiency. In the following chapters, three approaches that address the problem from circuit operation, circuit technique and circuit topology are proposed.

The first one is multi-phase operation of a hybrid converter, as discussed in Chapter.3. With multi-phase operation instead of dual-phase which is more commonly used, the effective frequency over the output inductors is 3 times higher leading to smaller inductors. While retaining the benefits of using a Dickson-Star hybrid converter, such as high conversion ratio, soft-charging of flying capacitors, the multi-phase operation has also been proved to gain the robustness on the flying capacitor mismatch. A demonstration PCB has been made to show the experimental results. The peak efficiency was captured at 40V-1.8V/4A with a number of 92.4%.

Secondly, an auxiliary circuit assisted Zero-Voltage-Switching 3-Level Buck (ZVS-3LB) converter is introduced in Chapter.4 with its fundamental operations, design analysis and key experimental results. By inserting an auxiliary ZVS circuit with around 20% area overhead, the converter achieves maximum 30% loss reduction compared with a conventional 3-level buck converter when the output current is below 1.5A. A peak efficiency of 92.4% is reached for 20V/5V conversion at 1A load. As another significant benefit, ZVS operation allows the switching frequency to reach a multiple Mega-Hertz range as a result of low switching loss, making the topology a good candidate for minimizing inductor usage.

Furthermore, an Integrated Transformer-less Stacked Active Bridge (ITSAB) converter that uses only nano-Henry scale inductors at 2-5MHz switching frequency is proposed in Chapter.5. Since it is derived from a Dickson-Star Switched Capacitor converter, the proposed converter inherits the benefit of low voltage stress on switches while enjoying an efficient fine regulation by phase shift, similar to a Dual Active Bridge (DAB) converter. The converter is optimized, designed and fabricated in 1.7mm*1.9mm area of a 130nm BCD process. The active die is flip-chipped on a 6.5mm*6.5mm package substrate together with power capacitors and two 10nH IPD inductors for demonstration, illustrating the feasibility of passive components integration, resulting in a peak efficiency of 91.2% and a peak power density of 1.36W/mm3 from 9.6-12V input to 2.15-3.3V output. Another demonstration is constructed on the same package substrate but with discrete air-core inductors. It achieves a peak efficiency of 92.4% and a peak power density of 0.62W/mm3, while delivering a max power of 7.5W. To achieve the performance, a detailed loss analysis and a unique optimization methodology for the converter, together with the design of key sub-blocks, including gate drivers (GDs), phase shift modulator (PSM), and ramp generator (RG), are provided in this chapter.

Additionally, a revised prototype of ITSAB converter that is capable of higher output current is presented in Chapter.6. It has been demonstrated 5.2A output current with 10nH inductors. The chip is fabricated with the same technology. The necessary techniques to achieve such high output current, including the 3D integration and switch partitioning, are addressed.

In last, a conclusion and future works, such as CC-CV mode, bidirectional conversion are presented.

This dissertation explored the ideas and concepts for hybrid switched capacitor converter topologies and new power delivery architectures to provide viable solutions for high conversion ratio DC-DC and AC-DC applications.

A new Multi Inductor Hybrid (MIH) Converter family for high conversion ratio DC-DC applications has been synthesized and analyzed to provide non-isolated DC-DC conversions with large voltage conversion ratios efficiently. The highlight of this converter family is a 6-level 6-phase 6-inductor MPMIH converter, which achieved 90.7% peak efficiency with a load range of 0-220A at 1V and 1kA/in^3 density.

A new modeling method reveals that all odd-level Flying Capacitor Multi-Level converters become current sources with non-ideal timing while the even-level converters stay as voltage sources. A method for identifying unbalanced hybrid converters is also provided.

This dissertation demonstrates a two-stage power delivery architecture to bridge AC distribution voltages to core levels for computing loads in data centers. In combination, direct conversion from \textasciitilde110 VAC to 1VDC achieves a peak efficiency of 84.1% while providing output currents up to 160A.

Partial power processing for AC/DC applications has been explored with a switched-capacitor (SC) based hybrid step-down converter and its new control techniques. The operation with multiple modules is verified with a 115VAC-to-48VDC conversion and 200VAC input to two 48VDC outputs.

A new modular isolated DC-DC converter is proposed and demonstrated for point-pf-load (POL) applications with partial power processing. A prototype of the modular architecture has been demonstrated for a 100V-to-3V point-of-load conversion with a maximum load of 60A. The peak efficiency of 91% is achieved at 57W/20A output.

A new multi-inductor multi-output hybrid converter is also proposed and demonstrated. The MiMoH converter prototype has been implemented to demonstrate conversion from a 24-48V input voltage to three individually regulated outputs ranging from 1.2V to 2.2V. The converter prototype achieves 40W peak power and 91.8% peak efficiency.

The topologies presented in this dissertation, corroborated with control and modeling techniques, demonstrated superior performance, natural balancing ability, and relatively easy controllability, making them excellent candidates for more compact and efficient system design.

The continual increase in performance and feature densities of small form factor mobile products has driven the need for high-capacity batteries and thus battery charger solutions with higher power-delivery densities to meet the demand for reduced charging times. The USB- C power delivery specification was developed to meet these higher demands by providing a programmable VBUS voltage range of 5–20 V with up to 100 W of power delivery, which serves as the input voltage (VIN) for the battery charger. A DC-DC converter that efficiently takes advantage of this wide VIN range while providing an output voltage (VO) range suitable for battery charging (e.g. 2.8V–4.2V) is challenging but highly desirable for space constrained products.

Hybrid converters provide a path to meet these challenges by leveraging the benefits of both switched-capacitor (SC) and switched-inductor (SI) techniques to reduce inductor size and efficiently provide high VIN⁄VO voltage conversion ratios (VCRs). The former is important since inductors have substantially lower energy storage densities compared to modern capacitor technologies. Therefore, inductors tend to be the largest occupiers of board space and bill-of- material cost out of all the converter passives. Additionally, die-level or package-level integration of high quality inductors can be challenging when compared to capacitors.This work intends to address these challenges by introducing new hybrid converter topologies that reduce the energy processing required by the inductor while still achieving the VCRs needed to take advantage of the benefits offered by higher VIN charging. This reduces the reliance on large, high quality inductors to maintain high power efficiency. The first part of this dissertation provides background regarding charge-based converter analysis. The next part presents a flying inductor hybrid topology that relocates the inductor from the high output current location to lower input current location while providing multiple outputs for 1-cell and 2-cell charging. The last part presents a single inductor multi-stage hybrid converter that utilizes an inductor to couple two SC stages to provide soft-charging benefits to each stage while leveraging reconfiguration to efficiently provide a wide range of VCRs.

This work proposes, analyzes, designs, and validates superior topologies of Ultra High gain hybrid (UHGH) converters that are capable of supporting extremely large conversion ratios up to ~2000X and output voltage up to ~4–12 kV for future mobile soft robots from an input voltage as low as the range of a 1-cell battery pack. Thus, the converter makes soft robots standalone systems that can be untethered and mobile. The extremely large voltage gain is enabled by a unique hybrid combination of a high-gain switched magnetic element (HGSME) and a capacitor-based voltage multiplier rectifier (CVMR) that, together, achieve small overall size, efficient operation, and output voltage regulation and shaping with simple duty-cycle modulation. With superior performance, power density, and compact size, the UHGH converters prove to be a promising candidate for future untethered soft robots.

As parallelism increases the number of cores integrated onto a chip, there is a clear need for fully integrated DC-DC converters to enable efficient on-die power management. Due to the availability of high density and low series resistance capacitors in existing CMOS processes, switched-capacitor DC-DC converters have recently gained significant interest as a cost-effective means of enabling such power management functionality.

In this thesis, described are design techniques to implement fully integrated switched-capacitor DC-DC converters with high power density and efficiency. The area required by a fully integrated switched-capacitor DC-DC converter in order to deliver a certain level of power to the load has direct implications on both cost and efficiency, and hence in Chapter 2 a methodology is presented to predict and minimize the losses of such a converter operating at a given power density. Chapter 3 further introduces gate driver and level shifter circuit design strategies to enable topology reconfiguration and hence efficient generation of a wider range of output voltages. In order to demonstrate the possibility of replacing all off-chip PMICs, Chapter 4 presents a battery-connected switched-capacitor DC-DC converter that is able to convert the wide input voltage range from Li-ion battery to an output regulated at ~1V using cascode switches and intermediate voltage rails. The SC converter in Chapter 4 also employs a fast control loop to regulate the output with sub-ns response times.

Measured results from the converters presented in Chapters 3 and 4 match with the analytical prediction and, thus, confirm the design methodology presented in Chapter 2. The 32nm SOI prototype presented in Chapter 3 achieves ~80% efficiency at a power density of ~0.5-1W/mm2 for a 2:1 step-down converter operating from a 2V input and utilizing only standard MOS capacitors. Reconfiguration of the converter's topology enables it to maintain greater than 70% efficiency for most of the output voltage range from 0.7V to ~1.15V. The 65nm Bulk CMOS prototype discussed in Chapter 4 also utilizes only standard MOS capacitors to regulate the output voltage at ~1V from a ~2.9V-4V input. It achieves ~73% efficiency at 0.19 W/mm2 output power density and maintain efficiency above 72% over the whole range of target power density. The sub-ns response control loop maintains <76 mV voltage droop out of a 1V regulated output under a full load step of 0 → 0.253 A/mm2 in 50ps.

Given that these results were achieved in a standard CMOS process with no modifications or additions, they illustrate that fully integrated switched-capacitor converters are indeed a promising candidate for low-cost but efficient power management on a per-core or per-functional unit basis. They can possibly replace all the off-chip PMICs and passive components and free up significant PCB area to be used to implement new functions on next-generation mobile devices.