UCLA

Semiconductor devices and IC technology, traditionally driven by Moore’s Law, have advanced significantly, with Si CMOS at the forefront. Scaling improvements have enabled higher integration and the development of system-on-chip (SoC) applications, combining digital and analog functions. However, further scaling faces challenges due to electrostatic limitations and process variations, making FinFET technology critical for sub-22nm nodes, thanks to its superior electrostatic control and current density. While super-scaled CMOS has been successful, its limitations in 5G/6G communications—such as low breakdown voltage and limited dynamic range—necessitate alternative materials. III-V compound semiconductors, with their superior transport and breakdown characteristics, offer a solution but face cost and integration challenges. Heterogeneous integration of these compounds with Si CMOS presents a promising pathway for high-performance, low-cost ICs, while integrating photonic elements with CMOS is key for future applications like photonic interconnects, micro-displays, and LIDAR systems.In this study, we demonstrate GaN/Si heterojunction integration at the junction level through selective GaN growth on Si (100) substrates using a two-step epitaxy process via MOCVD. The carefully designed structure facilitates the h-to-c GaN transformation and effectively traps defects (e.g., dislocations) away from the device's active region, resulting in the formation of a direct, defect-free c-GaN/Si junction. Additionally, we present the first GaN Drain Si MOSFET, which exhibits enhanced mobility compared to conventional Si MOSFETs. A thorough analysis of the GaN/Si heterojunction's breakdown voltage has also been conducted. These results underscore the potential of high-mobility and bandgap engineering in GaN/Si heterogeneous structures, paving the way for co-integration onto both planar and 3-D (e.g., FinFET) platforms.