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Physics and Modeling of Tunneling in Low Power Transistors
- Pan, Andrew
- Advisor(s): Chui, Chi On
Abstract
As CMOS electronics grow ever more ubiquitous and essential to modern life, managing and reducing power dissipation becomes essential. At the device level, this requires new transistors with reduced leakage currents and operating voltages. Opportunities and challenges in this regard arise from quantum transport effects. For instance, novel tunneling field-effect transistors (TFETs) can potentially operate at substantially lower voltages than MOSFETs by utilizing interband tunneling as the conduction process. Conversely, the Moore's law-driven scaling of MOSFETs down to the nanometer regime increases source-drain intraband tunneling, which may limit leakage power in future CMOS. Conventional device models and simulations based on semiclassical concepts are inadequate for describing such effects. In this dissertation, we develop new theoretical models to study tunneling and apply the resulting insights to MOSFET and TFET device design.
To this end, we develop a complete device simulator that uses non-equilibrium Green's functions (NEGF) to rigorously model quantum transport. We utilize a combination of NEGF, full band structure calculations, and analytical derivations to study the physics of interband tunneling in semiconductors. We clarify and improve the accuracy of commonly used analytical tunneling models and extend them to quantum confined structures, which include present and future scaled devices like ultra-thin body (UTB) transistors, FinFETs, and nanowire devices. We merge our findings with electrostatic analyses to derive the first general quasi-analytical current model for TFETs that provides device insight and is easily used for compact modeling. We show that existing TFETs are performance limited by the chemical source doping profiles, a particularly profound problem for III-V p-type TFETs. To overcome these limitations, we propose a new device design, the gate-induced source tunneling FET (GISTFET), which utilizes electrostatic doping to define the tunneling junction and allow for high performing complementary TFET systems. Finally, we derive the first model of source-drain tunneling in MOSFETs and study the effect of contact doping on leakage in scaled devices.
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