In recent years, climate change has been an alarming issue and there is a pressing need for a greener, cost-effective, durable high-density energy storage system. This thesis investigates an electrostatic energy storage method using flexible roll-to-roll capacitors at very high voltages (5 kV – 10 kV) and investigates PVDF as a potential dielectric material for the capacitors. PVDF is chosen as a material due to its high dielectric constant, high dielectric breakdown strength, and low flexural modulus (high flexibility). Short-time stepped voltage ramp dielectric breakdown and the time-dependent dielectric breakdown for 75 μm PVDF films have been studied to understand the DC dielectric breakdown strength for the application of PVDF dielectrics under high voltage stress for long periods of time. It has been shown that PVDF can withstand up to 10 kV and does not break down instantaneously. The failure rate dependence on electric field and temperature has been shown along with the prediction of the lifetime of PVDF dielectrics for a period of 10 years (100000 hours). It was found that a capacitor voltage range of 4000 - 9200 V for a 100 μm PVDF dielectric film would lead to a time to failure of 10 years. The acceleration parameters and activation energy of PVDF films have also been shown to demonstrate the temperature dependence on TDDB of PVDF films. This thesis attempts an in-depth understanding of dielectric breakdown mechanisms, proposes, and investigates PVDF as a potential dielectric candidate, and analyzes the TDDB of polymer films using the thermochemical model (E model).

Die-to-wafer (D2W) heterogeneous integration using thermal compression bonding (TCB) faces a serious issues of Cu surface oxidation, and it is uncapable of large-die assembly. Hybrid bonding, on the other hand, is considered as a candidate to replace TCB due to much better resistance to Cu oxidation and its capability for large die integration. Besides this, low temperature hybrid bonding has a great potential to achieve sub-micron pitch assembly because of a room-temperature alignment process. However, the bonding mechanism with real process issues has not yet been fully understood. In this thesis, Finite Element Analysis (FEA) and auxiliary experiments with real process issues have been implemented to explore the mechanism and the window of annealing temperature for the void-free interface. First, silicon dioxide fusion bonding is explored and optimized. A good D2W oxide bonding is achieved with 200 N of shear force (die size is 1.6 mm \times 1.6 mm). The aforementioned real process issues include Cu thickness non-uniformity and real dishing conditions. A Cu thickness variation of 6.6% across the whole wafer after electroplating causes a metal dishing between 4 nm and 16 nm during chemical mechanical planarization (CMP). The critical stress (78.1 MPa) of dielectric material gives the upper boundary of temperature, and the complete contact of metal limits the lower boundary for our FEA models. The window for the annealing temperature is then simulated to be within a range between 295℃ and 302℃. It is the first time that FEA with a non-uniform process input is implemented to generate a process window of D2W hybrid bonding for real world application. This thesis provides in-depth understanding and practical guidance for D2W hybrid bonding.

Leading-edge implantable applications such as neural implanted prosthetics and next-generation Internet of Things (IoT) devices require the integration of high performance and low power logic, memory and sensors at high interconnect density which is not possible using conventional printed flexible electronics. As flexible applications mature, there will be a demand that they are “smart,” which will require leading edge CMOS and RF electronics, advanced sensors, and power management. There is a need to develop a robust and flexible electronics packaging platform that will enable the unrestricted integration of high-performance, state-of-the-art components (processors, memories, sensors, data transmitters and receivers, power sources etc.) on biocompatible, flexible substrates with the ability to miniaturize, interconnect at high density with acceptable reliability, and scale-up in manufacturing at economical and cost-effective price points. Considering all the above requirements, in this work, the development of a highly flexible and reliable heterogeneous integration platform with fine interconnect pitch (≤ 40 �m) called FlexTrateTM is investigated. The fabrication and assembly processes necessary for such a platform are developed. FlexTrateTM is based on a die-first flexible Fan-Out Wafer-Level Packaging (FOWLP) approach where Polydimethylsiloxane (PDMS) is used as a molding compound to embed the heterogeneous dies and integrate them with mechanically robust vertically corrugated interconnects at 20-40 �m pad pitches without the use of solder. FlexTrateTM is demonstrated to be bendable to 1 mm bending radius for thousands of bending cycles with minimal degradation in the system’s electrical performance. The benefits to system performance and flexibility of FlexTrateTM-style integration are highlighted through three demonstrations: 200 dies integrated at 40 �m pad pitches, a foldable display, and a wearable biosensing system in the form of wireless multi-channel surface electromyography (sEMG) system. The sEMG system can be attached to the skin to record quality muscle signals through dry electrodes and can transmit data to a computer or smartphone via Bluetooth Low Energy (BLE). The ability to acquire muscle signals through our device in a mobile setting is critical for the study of many muscular physiological phenomena and disorders.

In this thesis, the through-wafer via (TWV) technology is developed for signal and power delivery on silicon interconnect fabric (Si-IF). The electrical performance of through-wafer via is simulated by ANSYS HFSS with different design parameters. Low insertion loss is obtained when it is operating at the low-frequency range (<1GHz). The electrical reliability issues such as electromigration are examined and verified. The thermal reliability issues related to TWV during Si-IF fabrication are analyzed by simulation. It is observed that interfacial delamination can be induced at the interface between Cu via and SiO2 liner due to the CTE mismatch between the materials. The TWV is fabricated in UCLA Nanolab on a 300μm thick wafer. Plasma dicing technology is also developed based on deep silicon etch to obtain smooth die edge after dicing, which enables compact die assembly on Si-IF.

The increasing demand for clean and sustainable energy sources necessitates effective energy storage solutions. This thesis proposes a decentralized approach to energy storage by utilizing high-density rolled polymer-based capacitors. The objective is to address the intermittent nature of renewable energy generation and develop a storage system that is affordable, sustainable, and easily deployable. Conventional capacitors typically do not exhibit high energy capacity. Therefore, this research emphasizes optimizing surface area, implementing high voltage storage capabilities (up to 3 kV), and utilizing a polymeric material with a high dielectric constant. By focusing on these factors, the research aims to overcome the limitations of conventional capacitors and develop a storage system with significantly increased energy density, enabling more efficient energy storage for clean and sustainable sources. This thesis presents the design and implementation of a high-efficiency DC/DC converter system for energy storage applications. The system utilizes a transformer less step-up converter and a flyback topology for step-down conversion. The transformer less step-up converter is designed to increase the input voltage efficiently, while the flyback topology is employed for effective voltage reduction. Both converters achieve an impressive efficiency of 90%. The proposed solution addresses the challenges of energy conversion in storage systems, ensuring both reliability and performance.

In the past few years, there has been a growing requirement for the development and innovation of MicroLED displays that can outperform Liquid Crystal Displays (LCDs) or Organic Light-Emitting Diodes (OLEDs) in terms of dynamic color range, contrast ratios, and brightness. This increased demand is mainly driven by the emergence of new application areas, such as wearable Virtual Reality (VR), Augmented Reality (AR) devices, Head-Up Displays (HUDs), and advancement in Optogenetics. Various companies have presented prototype MicroLED displays primarily in the form of large displays and smartwatches. However, there are still several challenges that need to be overcome before these displays can be commercially available. One of the technical challenges faced by the MicroLED displays is optical crosstalk. In this study, a method has been developed to quantify the optical crosstalk in the Quantum Dot-based flexible MicroLED display. The effect of features such as the gap between the MicroLED and the Q.D. layers, pixel dimensions, pitch length, and misalignment distance on the overall optical crosstalk of the display has been analyzed. Experimental analysis of optical crosstalk of MicroLED display with different features has been done to validate the ray-tracing model developed. Comprehensive analytical and experimental studies of the optical crosstalk have been done in this work.