A number of switch fabric architectures based on mini-router grids (MRG) have been proposed as a replacement of buses for system-on-chip communication, as well as a replacement of crossbars for network routers. The rationale for using MRGs in switch fabrics is that they provide high delivery ratios, low latencies, high degree of parallelism and pipelining, load balancing properties, and sub-quadratic cost growth for their implementation. The traditional approaches to switch fabrics are based on input queuing (IQ) or virtual output queueing (VOQ), because output queuing (OQ) solutions to date are unscalable and expensive due to the speedup problem. However, we show that the speedup problem introduced by OQ can be bounded by 3 by using MRGs.

We present the design of a switch fabric based on OQ MRGs that offers high delivery ratios, smaller queue sizes, and QoS guarantees. Queueing and scheduling are distributed over the MRs, where each MR is a pipestage, thus allowing MRGs to provide high throughput by nature. We present the first in-depth analytical model of switch fabric architectures based on OQ MRG, and support our model with register-transfer level (RTL) simulations in SystemC. The analytical and simulation results are shown to have close correlation over a range of design parameters and evaluation metrics.