A 300-GHz heterodyne receiver downconverts the input to an IF of 27 GHz and performs quadrature separation, thereby avoiding the need for power-hungry couplers and phase splitters. The LO generation consists of a 270-GHz fundamental-mode subsampling PLL with offset mixing driven by a 108-GHz PLL and a 54-GHz PLL. Fabricated in 28-nm CMOS technology, the receiver provides a voltage gain of 18 dB with a noise figure of 20 dB with I/Q gain mismatch of 1.2 dB and phase mismatch of 5.4 degrees.