Mobile, wearable, and internet of things (IOT) electronic systems are typically powered by a single cell Lithium-Ion (Li-ion) battery. Increasing demand for battery life and the constraint of the overall platform size impose an emerging desire for an efficient and com- pact power conversion stage that can directly deliver power from the battery, which ranges from 3.2V to 4.2V, to the supplies of application/communication processors in the range of 1V. The conventional buck converter, dimensioned for the 3.2-4.2 V input range, requires switches that are not typically available in standard sub-micron CMOS technology. Efficient implementation of the conventional buck converter has required a rather bulky off-chip inductor. The switched capacitor (SC) converter, though promising for a fully integrated solution, is inefficient at voltage regulation and is limited in capacitor energy utilization. In addition, with the SC converter, to cover the input range of a Li-ion battery to the processor supply voltage, topology reconfiguration has to be adopted. This additional functionality requires some additional design and implementation complexity.

Given the limitations of either pure inductive or pure capacitive converter topologies, various hybridized power conversion architectures have been proposed recently. The hybrid approaches leverage minimum magnetic components to mitigate the intrinsic charge sharing loss in the standard SC operation while still maintaining a better switch utilization inherent in some SC topologies. This thesis introduces a hybrid dc-dc converter topology named stacked resonant switched capacitor (Stack-ResSC) that eliminates charge sharing losses with a small inductor. Consequently, capacitor energy utilization is improved and lossless voltage regulation is enabled. Since the necessary inductance is small, the magnetic component can still be tightly integrated within the package with a PCB trace or a bondwire. The proposed topology can also adapt to any N-to-1 conversion ratio, which extends the topology for wider applications. Harmonic averaging is used in this thesis to develop the large and small signal model of the converter. A tight load line regulation can be effected with the designed controller according to the developed small signal model.

In addition to the Stack-ResSC, this thesis also introduces the stacked dual active bridge (Stack-DAB) as a derivative of the Stack-ResSC. An integrated circuit example is demonstrated with a nominal 3:1 conversion ratio. It supports a 3.2V-4.2V input voltage with a continuous output regulation of 0.8V-1.5V. The circuit delivers 83.4% efficiency at a power density of 0.46 W/mm2. The converter also shows superior transient response compared to state-of-art integrated implementation. This work demonstrates the advantage of the pro- posed hybrid approach in terms of tight integration and voltage regulation. The scope of the resonant switched capacitor based DC-DC converter is thus further extended.

Addressing the challenge of climate change requires the large-scale development of significant renewable energy generation, but also requires these intermittent energy sources to be balanced by energy storage or demand management to maintain a reliable electric grid. In addition, a centralized generation paradigm fails to capture and utilize thermal energy for combined heat and power, abandoning a large portion of the available value from the primary energy source. A solar thermal electric system utilizing Stirling engines for energy conversion solves both of these shortcomings and has the potential to be a key technology for renewable energy generation. The ability to store thermal energy cheaply and easily allows the reliable generation of output power even during absences of solar input, and operating as distributed generation allows the output thermal stream to be captured for local heating applications. Such a system also can achieve relatively high conversion efficiencies, is fabricated using common and benign materials, and can utilize alternate sources of primary energy in an extended absence of solar input.

This dissertation discusses the design, fabrication, and testing of a Stirling engine as the key component in a solar thermal electric system. In particular, the design addresses the low temperature differential that is attainable with distributed solar with low concentration ratios and is designed for low cost to be competitive in the energy space. The dissertation covers design, fabrication, and testing of a 2.5 kW Stirling Engine with a predicted thermal-to-mechanical efficiency of 20%, representing 60% of Carnot efficiency, operating between 180°C and 30°C. The design process and choices of the core components of the engine are discussed in detail, including heat exchangers, regenerator, pistons, and motor/alternator, and the process for modeling, simulation, and optimization in designing the engine. Finally, the dissertation covers the assembly and experimental testing that validates the design in terms of heat exchanger performance, losses, kinematics, and cycle work.

This dissertation explores circuit, control, and optimization techniques for power electronics with the objective of enabling high performance electric networks for a variety of important applications. The motivation for this work is driven in part by societal-scale trends towards systems that are increasingly dominated by power electronics, including applications such as renewable energy integration, vehicle electrification, power management for mobile devices, and data center power delivery. A key approach demonstrated in this dissertation is the design of switching power converter circuits that naturally coordinate with larger networks in order to achieve system-level benefits, whether with respect to efficiency, power quality, or reliability. A central goal of this work is to have this coordination realized in a decentralized or autonomous fashion, such that scalability, modularity, and resiliency can be achieved inherently. In the first part of this dissertation, we explore techniques for improving the power quality of electric networks with high penetrations of switching power converters, in particular, techniques that can minimize aggregate power converter harmonics in an optimal sense while also eliminating the need for communication between distributed converters. In the second part of this dissertation, we explore methods for improving the reliability and fault tolerance of such networks, in particular, model- and estimation-based strategies that transform power converters into active probes that can detect, identify, and diagnose faults in real-time. Together, these contributions demonstrate how power electronics can be designed and collectively controlled and optimized to enable highly efficient, robust, and resilient electric networks.

High brightness LEDs have become a mainstream lighting technology due to their efficiency, life span, and environmental benefits. As such, the lighting industry values LED drivers with low cost, small form factor, and long life span. Additional specifications that define a high quality LED driver are high efficiency, high power factor, wide-range dimming, minimal flicker, and a galvanically isolated output. The flyback LED driver is a popular topology that satisfies all these specifications, but it requires a bulky and costly flyback transformer. In addition, its passive methods for cancelling AC power ripple require electrolytic capacitors, which have been known to have life span issues. This dissertation details the design, construction, and verification of a novel LED driver that satisfies all the specifications. In addition, it does not require a flyback transformer or electrolytic capacitors, thus marking an improvement over the flyback driver on size, cost, and life span.

This dissertation presents an integrated circuit (IC) LED driver, which features a pair of generalized multilevel converters that are controlled via sigma-delta modulation. The first is a multilevel rectifier responsible for power factor correction (PFC) and dimming. The PFC rectifier employs a second order sigma-delta loop to precisely control the input current harmonics and amplitude. The second is a bidirectional multilevel inverter used to cancel AC power ripple from the DC bus. This ripple-cancellation module transfers energy to and from a storage capacitor. It uses a first order sigma-delta loop with a preprogrammed waveform to swing the storage capacitor voltage. The system also contains an output stage that powers the LEDs with DC and provides for galvanic isolation. The output stage consists of an H-bridge stack that connects to the output through a small toroid transformer.

The IC LED driver was simulated and prototyped on an ABCD silicon test chip. Testing and verification indicates functional performance for all the modules in the LED driver. The driver exhibits moderate efficiency at half voltage. Although the part was only testable to half voltage, loss models predict that its efficiency would be much higher at full voltage. The driver also meets specifications on the line current harmonics and ripple cancellation.

This dissertation introduces multilevel circuit techniques to the IC and LED research space. The prototype's functional performance indicates that integrated multilevel converters are a viable topology for lighting and other similar applications.

The traditional inductor-based buck converter has been the default design for switched-mode voltage regulators for decades. Switched capacitor (SC) dc-dc converters, on the other hand, have traditionally been used in low power (<10mW) and low conversion ratio (<4:1) applications where neither regulation nor efficiency is critical. This work encompasses the complete successful design, fabrication, and test of a CMOS based switched capacitor dc-dc converter, addressing the ubiquitous 12 V to 1.5 V board-mounted point-of-load application, which the buck converter has dominated. In particular, the circuit developed in this work attains higher efficiency (92% peak, and >80% over a load range of 5 mA to 1 A) than surveyed competitive buck converters, while requiring less board area and less costly passive components. The topology and controller enable a wide input range of 7.5 V to 13.5 V. Controls based on feedback and feedforward provide tight regulation under worst case line and load step conditions. This work shows that the SC converter can outperform the buck converter, and thus the scope of SC converter application can and should be expanded.

This dissertation discusses the design and validation of a community-scale DC microgrid architecture that can integrate renewable generation sources by using a distributed control scheme implemented on the microgrid-connected households to mitigate resource variability. The presented system is designed to address the technical and economic challenges of electrifying emerging regions. The levelized cost of electricity (LCOE) is expected to be less than $0.40 per kW-hr over a 15 year horizon.

Solar panel costs have steadily declined to make them a very affordable option for distributed generation. However, battery costs have not declined at the same rate. The important figure of merit for microgrids is the efficiency of stored electricity. The architecture presented in this work is shown to minimize losses in stored electricity. Another key feature of the system is the ability to prioritize loads by controlling the power flow of the system.

There are three key components of the presented DC microgrid architecture: source converters, fanout nodes, and household power management units (PMUs). The functionality of each of these components and the rationale for their design choices is presented in detail. The PMUs implement a distributed loadline control scheme to mitigate variability in available grid power. The design of the distributed control scheme of the DC microgrid is discussed in detail. The relevance of Lyapunov based analysis towards the large signal stability of grid voltage is also discussed.

The first-generation system uses a phase shifted full-bridge converter topology in the PMUs to convert from 380-to-12V in a single stage. Analytical analysis of this topology shows large signal and small signal stability. Transient response of the grid voltages and currents is shown through simulations. Experimental results are presented that showcase the operation and efficiency of system hardware.

The second-generation system incorporates a two-stage conversion architecture. The first stage is a 380-to-48V fixed ratio bus converter, which is used to generate a 48V bus for a local cluster of connected households. In the second stage, PMUs utilize a buck converter topology to step down from 48V-to-12V in each household. In addition to simulation and experimental validation of the hardware, a cost analysis is also presented to determine LCOE of system. The second-generation architecture achieves higher efficiency and reduced cost in comparison to the first-generation.

Lastly, grounding and protection of the microgrid is discussed in detail. Relevant examples from existing distribution schemes are presented and the rationale behind existing schemes are explored. A grounding and protection scheme that is suited to this dissertation's DC microgrid is presented. The protection scheme is validated throgh relevant simulations and experiments.

This work presents a grid topology that is designed to adapt to a changing landscape of solar PV prices and meets the challenge of providing a scalable and low-cost electrification solution. Future efforts in addressing the energy needs of unelectrified regions can build on the work presented in this dissertation.

The advancement of sensing technologies for the power grid has allowed the development of new strategies for the control of distributed energy resources (DERs). In particular, the emergence of phasor measurement units (PMUs) designed for deployment at the distribution level has presented an exciting opportunity. These PMUs have enabled the development of phasor-based control (PBC), a strategy that formulates DER power dispatch in terms of voltage phasor targets to be tracked by local controllers.

This dissertation focuses on the optimal power flow (OPF) component of PBC’s supervisory control layer, which has previously been conceptualized and demonstrated in simulation on distribution networks. We expand its applicability to medium-voltage minigrids and microgrids operating in island mode, networks where PBC has the potential to deliver important benefits.

The work is carried out in two stages. After a discussion of PBC and other relevant background topics, we address one of the primary challenges to PBC at the medium voltage level: the need for extreme accuracy in the supervisory controller’s generation of phasor targets. This accuracy is achieved through an adaptation of an iterative OPF methodology that refines a linearized model of power flow through successive exchanges with a nonlinear solver. We discuss the changes that were made to both linear model and nonlinear solver, as well as the determination of phasor targets on networks that include tap-changing transformers and other realistic equipment. The accuracy of the adapted iterative method is then shown in simulation.

The second stage of the work covers the extension of our OPF implementation to islanded systems. We present a strategy for the treatment of the slack bus used by our nonlinear solver and apply it to several test cases in simulation. We then analyze a specific case in which our iterative solution method fails, and demonstrate the use of a penalty factor in our linearized OPF formulation as a means of overcoming that failure. A full, end-to-end implementation of PBC’s supervisory layer is then proposed and tested on a number of DER distributions at different feeder penetration levels.

We end with a presentation of data relevant to instrument-transformer-induced error in PMU measurements. This final portion stands alone from the primary work of the dissertation, but remains highly relevant to PBC. From an experimental deployment of two PMUs measuring an identical distribution-grid voltage, we determine a ratio of the errors induced by their individual potential transformers. Monitoring this quantity over the course of a year allows us to track the drift in those induced errors over time, motivating a discussion of the expected impact of error drift on PBC and the frequency with which transformers will need to be recalibrated in operational settings.

As parallelism increases the number of cores integrated onto a chip, there is a clear need for fully integrated DC-DC converters to enable efficient on-die power management. Due to the availability of high density and low series resistance capacitors in existing CMOS processes, switched-capacitor DC-DC converters have recently gained significant interest as a cost-effective means of enabling such power management functionality.

In this thesis, described are design techniques to implement fully integrated switched-capacitor DC-DC converters with high power density and efficiency. The area required by a fully integrated switched-capacitor DC-DC converter in order to deliver a certain level of power to the load has direct implications on both cost and efficiency, and hence in Chapter 2 a methodology is presented to predict and minimize the losses of such a converter operating at a given power density. Chapter 3 further introduces gate driver and level shifter circuit design strategies to enable topology reconfiguration and hence efficient generation of a wider range of output voltages. In order to demonstrate the possibility of replacing all off-chip PMICs, Chapter 4 presents a battery-connected switched-capacitor DC-DC converter that is able to convert the wide input voltage range from Li-ion battery to an output regulated at ~1V using cascode switches and intermediate voltage rails. The SC converter in Chapter 4 also employs a fast control loop to regulate the output with sub-ns response times.

Measured results from the converters presented in Chapters 3 and 4 match with the analytical prediction and, thus, confirm the design methodology presented in Chapter 2. The 32nm SOI prototype presented in Chapter 3 achieves ~80% efficiency at a power density of ~0.5-1W/mm2 for a 2:1 step-down converter operating from a 2V input and utilizing only standard MOS capacitors. Reconfiguration of the converter's topology enables it to maintain greater than 70% efficiency for most of the output voltage range from 0.7V to ~1.15V. The 65nm Bulk CMOS prototype discussed in Chapter 4 also utilizes only standard MOS capacitors to regulate the output voltage at ~1V from a ~2.9V-4V input. It achieves ~73% efficiency at 0.19 W/mm2 output power density and maintain efficiency above 72% over the whole range of target power density. The sub-ns response control loop maintains <76 mV voltage droop out of a 1V regulated output under a full load step of 0 → 0.253 A/mm2 in 50ps.

Given that these results were achieved in a standard CMOS process with no modifications or additions, they illustrate that fully integrated switched-capacitor converters are indeed a promising candidate for low-cost but efficient power management on a per-core or per-functional unit basis. They can possibly replace all the off-chip PMICs and passive components and free up significant PCB area to be used to implement new functions on next-generation mobile devices.

This dissertation is focused on how the integration of inverter-based resources into our power grids are forcing a re-examination of the fundamental principles upon which we operate and analyze these complex systems. Increased electrification and decarbonization of our energy sources are critical if we are to mitigate the impacts of climate change.

Chapter 1 presents a high-level overview of why inverter-based resources are such a transformative technology for large-scale power systems. We discuss how our current power system operational practices are designed around the inherent physical properties of synchronous machines and how we may need to re-visit some of these practices moving forward.

Chapter 2 considers a model of a battery energy storage system and tries to understand, for the voltage source inverter control scheme considered, the importance of modeling the DC side dynamics on the overall behavior of the inverter. We show that, for the controllers considered in this dissertation, we can model the DC side as a fixed voltage source without any loss in accuracy.

Chapter 3 examines how the cyber-physical attack surface of our power systems is changing with the inclusion of inverter-based resources. These dynamical devices perform active control across timescales with their multi-layered digital control loops, whose interaction through the network can result in unexpected system level dynamics. We consider the case of an adversary seeking to control a power electronic load to induce an instability in the system. We demonstrate how the outer-control loop and the phase-locked loop on inverter-based resources might be most vulnerable to attack and what, if any, signatures might appear at the system level during such an attack.

Chapter 4 considers how me might defend the system against the de-stabilizing attack considered in Chapter 3. We propose an adaptive controller that monitors the integrator state of the phase-locked loop for any abnormal sustained oscillatory behavior. In the event that this is present in the signal, we introduce a small amount of stochastic behavior into the control logic of the inverter to invalidate the model of the system that the adversary used in controller design. We show the performance of the proposed controller through simulation on a small microgrid system.

Chapter 5 explores how we might proactively increase the damping ratio of underdamped system modes by using subspace identification to build a reduced-order model that captures the interaction between a local inverter-based resource and the external grid. We show that, by perturbing the reactive power channel of the inverter, we can build a reduced-order model that we can use for controller design to improve the dynamical response of the inverter. We compare the response of inverter-based resources with and without the proposed damping controller in simulation and show improved dynamical response following the tripping of a transmission line.

Chapter 6 moves from control to simulation of large-scale power electronic dominated power systems and explores how the growing field of scientific machine learning might offer opportunities to accelerate time-domain simulations of these systems. Due to the high control bandwidth of inverter-based resources, and their power rating relative to synchronous machines, the number of differential equations needed to analyze these systems is significantly increasing. We show how echo-state networks, trained at the same timestep as was used by an implicit adaptive ODE solver to solve the system, can rapidly, and accurately, predict the system response for parameters outside the training set. We discuss how this approach could be adapted by system operators today as well as some interesting future research directions.

Finally, this dissertation concludes with a brief summary and directions for future research.