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Silicon-Germanium Based Tunnel Field Effect Transistor for Low Power Computation


In this thesis we mainly focus on silicon germanium based gate normal tunnel field effect transistor. We carried out TCAD modeling with special attention paid to band structure modification of the silicon germanium heterojunction. By incorporation of results of k*p theory into Sentaurus Device, we evaluated device perfornamce of gate normal TFET with s-Si/s-Ge/Si0.5Ge0.5 heterojunction. The device showed steep turn on characteristic with subthrethold swing below 60mV/dec spanning six orders of output current. Moreover, the device showed much better tolerance for process variation such as source doping gradient change. Motivated by theoretical results, we designed fin based vertical tunnel field effect transistor (FAVFET). Such a device configuration can achieve scaling potential comparable to FinFET in addition to greatly saved processing complexity. Finally we developed key processes and physically implemented prototype of FAVFET, with Nickel silicided source as a replacement part for selective germanium epitaxy. Electrical characterization showed good tunneling behavior with promising performance like high output resistance. Such results gave us confidence that FAVFET structure is a promising TFET configuration and holds bright future for application in low power electronics.

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