UC Santa Barbara

This dissertation presents a path toward silicon photonic short reach dense wave-length division multiplexing interconnects capable of scaling to 1 Tbps with link energy consumption approaching 200 fJ/bit and areal densities exceeding 5 Tbps/mm2 within ambient operating temperatures ranging from 20 to 80 °C. The system’s architecture in the electronic and photonic domains, along with its evolution, are outlined with an em- phasis on the photonic aspects. Such a transceiver photonic integrated circuit contains hundreds of photonic elements that have stringent performance requirements with regards to footprint, energy consumption, and fabrication reproducibility, among other things. As such, the measured performance of many of these photonic elements is detailed; fur- ther, methods are shown for modelling the performance of some of these components for practical design, namely elements formed using Mach-Zehnder interferometers and microring resonators.

Forming a system of that is appropriately electrically and optically interconnected toperform requires extensive packaging, which is outlined in this work with a focus on the silicon photonics chip. Co-packaging validation experiments are shown, building towards a demonstration of a discrete silicon photonic transceiver and a packaged mode-locked laser comb source at 27 Gbps per wavelength.

Finally, to further the goal of quantifying fabrication uncertainties and their impacton silicon photonic systems, this work also introduces an experimental methodology to estimate the lithographic overlay error between a waveguiding layer and another layer capable of perturbing the guided mode; steps capable of introducing perturbations include ion implantation, etching of the waveguide layer, and deposition of material layers within close proximity to the waveguide. Such a tool should allow for more precise uncertainty quantification in photonic elements such as modulators, photodiodes, and passive mode- evolution based devices, which should in turn lead to more optimized component designs.