UC San Diego

Wideband, high-data rate wireless communication systems generally suffer- fer from low-efficiency or poor linearity. To realize both a linear response and high- efficiency, a variety of linearization approaches have been proposed. Polar transmitters separate the signal into amplitude and phase components. The phase component drives a high-efficiency power amplifier (PA) while the amplitude component drives the power supply. While this improves the efficiency of the PA, the amplitude modulator requires much higher bandwidth compared to the input signal. Envelope tracking systems generally struggle to reach bandwidths exceeding 100 MHz due to the difficulty to realize supply modulators that remain efficient over wide bandwidth. An alternative to envelope tracking is linear amplification with nonlinear components (LINC) also called outphasing. In an outphasing transmitter, an input signal is separated into amplitude and phase components that are used to construct two constant-envelope phase-modulated signals. Therefore, high-efficiency PAs amplify the constant envelope signals and this improves the efficiency without degrading the linearity. The amplified signals are combined together to restore the amplitude and phase components of the output signal. Although, in theory, for an outphasing system combining two outphased signals would restore the original signal, any imbalance results in error. For example a phase mismatch between the two signals translates into phase and amplitude error in the combined signal which limits the control over the output power dynamic range. In this dissertation first the system level of the proposed outphasing modulator is presented to highlight the main blocks. Digital to analog converter (DAC) is introduced as one of the main blocks and the implemented 10-bit power DAC is described. This DAC is implemented in 45-nm CMOS SOI and is capable of delivering current swings sufficient for 6 V swing on a 50-[Omega] load. This the highest swing reported in the literature for a high-resolution DAC. Then, the 10-GHz wideband outphasing modulator is presented which includes four of the power DACs along with two I/Q up-converters. This modulator is also in 45-nm CMOS SOI and can operate at 1.1 Gbit/s by using 265-QAM. This modulator is meant to drive off-chip GaN or GaAs PAs. Therefore, each channel of the modulator is designed to deliver 20 dBm which is sufficient to drive GaN/GaAs PAs. This is the first demonstration of the outphasing modulator for data rates above 1 Gbit/s. Finally, a polar modulator based on coupled oscillators is proposed. This modulator is taped- out in 45 nm CMOS SOI. Chip is not tested and block diagram and simulation results are presented