UCLA

Time-domain data converters offer an attractive alternative to conventional voltage-domain architectures by leveraging the scaling benefits of digital CMOS circuits. However, achieving high resolution and linearity while maintaining low power consumption remains challenging due to the limitations of voltage-to-time conversion, time quantization, and delay generation. This dissertation presents circuit techniques for developing energy-efficient, high-resolution time-domain data converters. The first part of this dissertation presents a 6-bit two-step time-domain ADC operating at 2.15 GS/s with a power consumption of 1.05 mW. A high-gain comparator-based voltage-to-time converter (VTC) eliminates the need for an active residue amplifier, while a resistively interpolated TDC enables power-efficient time quantization. A 3-bit flash ADC limits the VTC input range to improve linearity, and a passive residue-transfer technique further reduces power consumption. On-chip calibration techniques compensate for comparator offsets, VTC gain and offset errors, and TDC nonlinearity. The prototype achieves an SNDR of 32.7 dB at the Nyquist frequency and a Walden figure-of-merit of 13.8 fJ/cs. The second part presents a 9-bit two-step TDC that combines a counter-based coarse TDC with a SAR-based fine TDC to achieve high resolution over a wide dynamic range. A CTT-based programmable delay cell provides nonvolatile delay tuning, eliminating the need for volatile calibration storage. A mismatch-tolerant delay-selection technique reduces the impact of systematic delay-cell mismatch while preserving the required tuning range and resolution. The SAR-based fine TDC uses binary-weighted time references to achieve high power efficiency, while the counter-based coarse TDC extends the overall dynamic range. Together, these techniques enable a low-power and highly linear TDC. Overall, this dissertation demonstrates circuit and architectural techniques that exploit the time domain to achieve high-speed, high-resolution data conversion with low power consumption.