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Power blurring has been developed to calculate temperature profiles in VLSI ICs, in both steady-state and transient regimes. It is illustrated that PB is very fast and accurate in steady-state thermal analysis. However, the transient method was inefficient when it was handling the temperature analysis of real workloads. A new algorithm for transient power blurring has been developed to calculate temperature profiles of real workloads. It is shown that the method can be utilized for thermal simulation at both device and architecture level. A detailed comparison is performed between the power blurring method and two of the commonly used architecture level thermal simulators, HotSpot and SESCTherm simulators. We take into account both the accuracy of the thermal simulation and the computational speed. The results indicate that Power Blurring has the potential to be a promising architecture level thermal simulator for fast calculation of the temperature profile from the input power map in a realistic package which, in turn, is a key ingredient for full self-consistent simulations.

Additionally, power blurring is extended so that it considers the temperature dependent thermal conductivity of silicon chips in ICs. Temperature rises of 40-50°C on the chip will reduce the thermal conductivity of silicon by 10-20%. This could affect the hot spot temperature by 5-7°C. In this work the PB approach, which is based on the superposition principle, is extended to account for the temperature-dependent material properties. Two Adaptive Power Blurring (APB) methods based on iterative procedures are proposed. In both methods, PB provides an initial temperature distribution estimation using the room temperature Si thermal conductivity. Good convergence is achieved in only 2-3 iterations in both methods. It is demonstrated that these APB methods substantially improve the accuracy at high temperature rise values, in particular at hot spots, while still being much faster than traditional finite element modeling (FEM) computations.

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