UC Riverside

On-chip power densities continue to increase in modern integrated circuits (IC) due to rapid integration and feature scaling.As a consequence, today's high-performance processors have become more thermally constrained than ever before. Increase in temperature has been shown to exponentially degrade reliability of semiconductor chips and has consequently become one of the leading concerns in the industry today. In this thesis, we present our findings and share our contributions from our research efforts in the areas of pre-silicon IC reliability analysis, post-silicon thermal estimation, and advanced microprocessor cooling. Specifically, the first segment of this manuscript will focus on a novel structure-based approach to accelerating electromigration (EM) wear-out for the purposes of post-silicon qualification and burn-in testing. The proposed approach achieves time-to-failure acceleration comparable to the existing current and temperature based stressing techniques at close to nominal operating conditions. Temperature and reliability go hand-in-hand; hence monitoring and managing the processor's temperature while it is in use is equally important in order to maximize performance while minimizing reliability impacts. Therefore, the second segment of this thesis will present our data-driven post-silicon approach to estimating the spatial temperature distribution across the surface of the die in real time. This approach leverages the latest advancements in recurrent-neural-networks for time-series estimation. The estimated temperatures from the proposed model can then be used to supplement the temperature information sensed from the embedded thermal sensors in order to make better informed thermal and reliability regulation decisions. Lastly, the third segment of this thesis will focus on leveraging the aforementioned real-time temperature estimation technique and the emerging thermo-electric based active cooling technologies to propose an on-demand targeted cooling system for modern high-performance processors. This approach yields the sub-ambient cooling benefits of thermo-electric cooling with lower power overheads.