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Hetero-epitaxy and Defect Formation in Nanopillars: An Experimental and Theoretical Study


Nanopillars are a next generation platform for building high-performance opto-electronic devices. The uniform arrays of III-V semiconductor pillars are microns long, vertically oriented, and have sub 100 nm diameters. The small volumes and crystalline surfaces make them excellent candidates for low noise detectors, and with their well-controlled periodic geometry they can be engineered into novel photonic devices. This work demonstrates new growth capabilities that will improve and enhance the performance of nanopillar opto-electronic devices. Using a combined experimental and theoretical approach I demonstrate control and understanding of three-dimensional hetero-epitaxy in the GaAs and InP material systems, and control of a prevalent defect in GaAs nanopillars called a stacking fault.

Nanopillars are grown by catalyst-free, selective-area metal-organic chemical-vapor- deposition, and experimental results are interpreted with first-principles calculations of adatom binding energy and defect formation energies on the relevant crystal surfaces. This methods of growth, characterization, and theoretical calculations are described in Chapter 2. Chapter 3


presents the results of InGaAs hetero-epitaxy on GaAs nanopillars and InAsP hetero-epitaxy on InP nanopillars. Experimental results and theoretical calculations identify adatom mobility on the nanopillar sidewalls as the critical element for controlling hetero-epitaxy in the axial or radial directions. Chapter 4 demonstrates that stacking faults can be eliminated from GaAs nanopillars by raising the growth temperature to 790°C, and first-principles calculations of critical nuclei on the nanopillar tip support the theory that higher temperature reduces the stacking fault density by increasing the size of the critical nucleus.

The hetero-epitaxial capability in GaAs/InGaAs has already been critical in the realization of nanopillar based lasers and LEDs. Further improvements in device performance can be achieved by leveraging the newly developed capability to grow GaAs with fewer stacking faults. The hetero-epitaxial techniques demonstrated with InP/InAsP can be used to access wavelengths not possible with GaAs/InGaAs nanopillars.

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