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Design and Analysis of Spectrum Scanners Based on Passive, Linear Periodically Time-Varying Circuits

Abstract

Spectrum sensing finds its use is many applications. With modern communication systems moving towards Cognitive Radios (CRs) to better utilize the available spectrum, spectrum sensing is a key enabling functionality that allows the detection of primary users and interferes to support spectrum sharing. Spectrum sensing can also be useful in security applications that require a certain degree of RF spectrum awareness. In addition, it can be used for built-in self-test like transmitter tuning by measuring the output spectrum to allow spur reduction and digital predistortion.

To be useful, the spectrum scanners used for sensing should be able to handle large blockers and detect weak signals at the same time. Thus both good linearity and high sensitivity are desired. In addition, these scanners need to be highly programmable and selective while incurring a low power cost.

In this research we have addressed the issues that plague traditional spectrum scanners by using the recent technique of Filtering by Aliasing (FA). The FA-based spectrum scanner is a passive structure that uses simple but linear, periodically time-varying (LPTV) RC circuits. This LPTV circuit is shown to provide a high spurious-free dynamic range, precise resolution bandwidths while still consuming very low power.

In this dissertation, the FA technique is briefly explained, and the design considerations and implementation of a spectrum scanner IC that achieves excellent linearity and low power as compared to state-of-the-art designs is presented. In addition, a theoretical analysis of some of the limiting factors of the passive LPTV scanner is presented together with some circuit and/or signal-processing solutions.

Chapters 2 and 3 of this dissertation are the reprint of a paper that is to be published in full in the IEEE Journal of Solid-States Circuits (JSSC). The dissertation author is the primary investigator and Professor Sudhakar Pamarti supervised the research which forms the basis for this paper. Dr. Mansour Rachid and Professor Shanthi Pavan from IIT, Madras collaborated on this work as well.

Chapters 4 and 5 of this dissertation are the reprint of a paper under preparation to be submitted in part or in full to the IEEE Transactions of Circuits and Systems-1 (TCAS-1). The dissertation author is the primary investigator and Professor Sudhakar Pamarti supervised the research which forms the basis for this paper. By the virtue of being independent papers, there is a slight degree of content overlap between Chapters 2-3 and 4-5.

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