UC Berkeley

Since the inception of solid state semiconductors and device fabrication techniques, continuous scaling has been implemented as a key driver behind realizing faster electronics while optimizing for power consumption, improving the field in an exponential fashion (i.e. Moore’s Law) and facilitating modern technological advances that otherwise would have been impossible. In recent years, transistor gate length has entered into the single nanometer regime, encountering significant engineering and cost challenges. While efforts at mitigating these challenges have extended the lifetime of silicon-based semiconductors (all-around gate FETs for example), a more fundamental overhaul of the transistor is needed for long term progress if Moore’s law is to be upheld in terms of power reduction and performance improvement.

2D materials serve as an ideal candidate for addressing scaling issues on various fronts. Possessing atomic scale smoothness, varying band alignment, and desirable bandgap in the single layer limit, 2D transition metal dichalcogenides (TMD) material can serve as the active channel layer for transistors geared towards various different applications. Given their atomic smoothness and interlayer van der Waal interactions, 2D TMDs provides the intrinsic scaling advantage in the vertical axis while the ideal uniformity allows for predictability of carrier behavior across lateral areas. However, realistic integration of 2D TMDs into devices have been far from ideal, and the existence of both surface and edge defects on the system becomes the current bottleneck prohibiting any realistic integration of 2D TMDs into modern devices. In this report, we examine both surface and edge defects of 2D TMDs, their effects on carrier movements and recombination, establish an analytical model of defect analysis, and introducing a new approach to TMD patterning considering effects on the resultant edges.

Specifically, the surface defects on tungsten diselenide (WSe2) will be discussed in relation to traditional field effect transistor applications, and how we can take advantage of such surface defects and engineer them into sites of p-type doping via covalent functionalization. In this way, we demonstrate a 5 order of reduction in the contact resistance tunable degenerate doping.

Additionally, edge defects of tungsten disulfide (WS2) are characterized by ways of experimentally measuring generated carrier recombination. A universal metric applicable to all 2D semiconductor is introduced here towards describing the edge defect quality called Edge Recombination Velocity (ERV). A qualitative discussion of the edge defect will also be presented here with respect to edge etching methods, differences in the 2D material chosen, and intrinsic edge orientation.

Finally, we demonstrate scanning probe lithography (SPL) as a reliable top down method towards nanoscale patterning of 2D materials, and expand the ERV characterization platform to MoS2, MoSe2, WS2, and WSe2. Additionally, we demonstrate that through SPL, different materials possess drastically different ERVs, highlighting the lessened impact of the process induced edge defects, establishing a platform for material-based edge passivation experiments.